From: Blue Swirl <blauwirbel@gmail.com>
To: Bob Breuer <breuerr@mc.net>
Cc: qemu-devel <qemu-devel@nongnu.org>
Subject: [Qemu-devel] Re: sparc OBP psr value
Date: Sun, 12 Dec 2010 08:59:57 +0000 [thread overview]
Message-ID: <AANLkTiniG3tipRsRQinF3KF-2ZGP9n4FJbzrW1+PrMdw@mail.gmail.com> (raw)
In-Reply-To: <4D04149C.2020709@mc.net>
On Sun, Dec 12, 2010 at 12:17 AM, Bob Breuer <breuerr@mc.net> wrote:
> Under qemu-system-sparc, I found a problem with OBP's psr commands.
>
> On an real SS-20, I get:
> ok .psr
> CWP: 4 ET: 1 PS: 1 S: 1 PIL: f EF: 1 EC: 0 ICC: nZvc VER: 0
> IMPL: 4
> ok %psr .
> 40401fe4
> But with qemu, it all shows up as 0, such as:
> ok .psr
> CWP: 0 ET: 0 PS: 0 S: 0 PIL: 0 EF: 0 EC: 0 ICC: nzvc VER: 0
> IMPL: 0
> ok %psr .
> 0
> while "info registers" says the psr should be 40001de0.
I can't reproduce this:
ok .psr
CWP: 0 ET: 1 PS: 1 S: 1 PIL: f EF: 0 EC: 0 ICC: nZvc VER: 0 IMPL: 4
ok %psr .
40400fe0
next prev parent reply other threads:[~2010-12-12 9:00 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-12-12 0:17 [Qemu-devel] sparc OBP psr value Bob Breuer
2010-12-12 8:59 ` Blue Swirl [this message]
2010-12-12 19:13 ` [Qemu-devel] " Bob Breuer
2010-12-15 15:07 ` Bob Breuer
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