From: G 3 <programmingkidx@gmail.com>
To: alarson@ddci.com
Cc: "qemu-devel@nongnu.org qemu-devel" <qemu-devel@nongnu.org>,
"qemu-ppc@nongnu.org list:PowerPC" <qemu-ppc@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH v3] target-ppc: Enable open-pic timers to count and generate interrupts
Date: Sun, 18 Jun 2017 16:38:29 -0400 [thread overview]
Message-ID: <B89DC65F-3BF3-4140-9467-5E0921E100FE@gmail.com> (raw)
In-Reply-To: <OFEB04B3D4.4F8B4FD7-ON86258143.0070FC87-86258143.00713D4F@ddci.com>
On Jun 18, 2017, at 4:36 PM, alarson@ddci.com wrote:
> G 3 <programmingkidx@gmail.com> wrote on 06/18/2017 09:45:25 AM:
>
>>>>> From: Aaron Larson <alarson@ddci.com>
>>>>> To: agraf@suse.de, alarson@ddci.com, david@gibson.dropbear.id.au,
>>>> qemu-devel@nongnu.org, qemu-ppc@nongnu.org
>>>>> Date: 06/05/2017 12:22 PM
>>>>> Subject: [PATCH v3] target-ppc: Enable open-pic timers to count
>>>>> and
>>>> generate interrupts
>>>>>
>>>>> Previously QEMU open-pic implemented the 4 open-pic timers
>>>>> including
>>>>> all timer registers, but the timers did not "count" or generate
>>>>> any
>>>>> interrupts. The patch makes the timers both count and generate
>>>>> interrupts. The timer clock frequency is fixed at 25MHZ.
>
> G3> Does QEMU behave differently after this patch is implemented?
>
> If the open-pic timers are programmed, then QEMU behaves
> differently, otherwise there should be no difference.
I guess I should have asked what differences did you see in QEMU's
behavior?
next prev parent reply other threads:[~2017-06-18 20:38 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <mailman.79275.1497783014.22739.qemu-devel@nongnu.org>
2017-06-18 14:45 ` [Qemu-devel] [PATCH v3] target-ppc: Enable open-pic timers to count and generate interrupts G 3
2017-06-18 20:36 ` alarson
2017-06-18 20:38 ` G 3 [this message]
2017-06-18 22:15 ` alarson
2017-06-05 17:22 Aaron Larson
2017-06-16 16:31 ` alarson
2017-06-18 9:04 ` David Gibson
2017-06-19 13:57 ` alarson
2017-06-18 12:24 ` David Gibson
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