From: Laurent Desnogues <laurent.desnogues@gmail.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Blue Swirl <blauwirbel@gmail.com>, qemu-devel <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH 9/9] cpu-exec.c: avoid AREG0 use
Date: Sun, 22 May 2011 19:33:51 +0200 [thread overview]
Message-ID: <BANLkTi=B-YWL6KXa4Qf3YGL8098HDDE59g@mail.gmail.com> (raw)
In-Reply-To: <BANLkTikv=ckUDFQVxY-XXGdGirshqBxBVw@mail.gmail.com>
On Sun, May 22, 2011 at 7:10 PM, Peter Maydell <peter.maydell@linaro.org> wrote:
> On 22 May 2011 17:55, Blue Swirl <blauwirbel@gmail.com> wrote:
>> For ARM, the handcrafted instructions below need to be changed to save also r7:
>> /* stmdb sp!, { r4 - r6, r8 - r11, lr } */
>> tcg_out32(s, (COND_AL << 28) | 0x092d4f70);
>>
>> /* ldmia sp!, { r4 - r6, r8 - r11, pc } */
>> tcg_out32(s, (COND_AL << 28) | 0x08bd8f70);
>
> That would be ...ff0 rather than ...f70 in both cases
> (bottom 16 bits are a bit map of registers being saved/loaded):
>
> /* stmdb sp!, { r4 - r11, lr } */
> tcg_out32(s, (COND_AL << 28) | 0x092d4ff0);
>
> /* ldmia sp!, { r4 - r11, pc } */
> tcg_out32(s, (COND_AL << 28) | 0x08bd8ff0);
Shouldn't you extend the range to include r12, due to
the 8-byte alignment restriction of the stack?
Laurent
next prev parent reply other threads:[~2011-05-22 17:33 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-05-22 11:18 [Qemu-devel] [PATCH 9/9] cpu-exec.c: avoid AREG0 use Blue Swirl
2011-05-22 16:55 ` Blue Swirl
2011-05-22 17:10 ` Peter Maydell
2011-05-22 17:33 ` Laurent Desnogues [this message]
2011-05-22 18:01 ` Peter Maydell
2011-05-23 22:01 ` Aurelien Jarno
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