From mboxrd@z Thu Jan  1 00:00:00 1970
Received: from eggs.gnu.org ([140.186.70.92]:49405)
	by lists.gnu.org with esmtp (Exim 4.71)
	(envelope-from <blauwirbel@gmail.com>) id 1QPfy8-0000Tq-6a
	for qemu-devel@nongnu.org; Thu, 26 May 2011 15:11:40 -0400
Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)
	(envelope-from <blauwirbel@gmail.com>) id 1QPfy7-0002H4-Dc
	for qemu-devel@nongnu.org; Thu, 26 May 2011 15:11:40 -0400
Received: from mail-qw0-f45.google.com ([209.85.216.45]:58855)
	by eggs.gnu.org with esmtp (Exim 4.71)
	(envelope-from <blauwirbel@gmail.com>) id 1QPfy7-0002Gz-BX
	for qemu-devel@nongnu.org; Thu, 26 May 2011 15:11:39 -0400
Received: by qwj8 with SMTP id 8so653365qwj.4
	for <qemu-devel@nongnu.org>; Thu, 26 May 2011 12:11:39 -0700 (PDT)
MIME-Version: 1.0
In-Reply-To: <BANLkTimVWYZsASbygNUg8qm7ioPi==m4-Q@mail.gmail.com>
References: <4DDD4E15.1080404@mcgary.org>
	<BANLkTimVWYZsASbygNUg8qm7ioPi==m4-Q@mail.gmail.com>
From: Blue Swirl <blauwirbel@gmail.com>
Date: Thu, 26 May 2011 22:11:19 +0300
Message-ID: <BANLkTi=E8wqLpcRVhzhQKTLVy8=VJOz0Ow@mail.gmail.com>
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: quoted-printable
Subject: Re: [Qemu-devel] Multi heterogenous CPU archs for SoC sim?
List-Id: <qemu-devel.nongnu.org>
List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>
List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel>
List-Post: <mailto:qemu-devel@nongnu.org>
List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help>
List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=subscribe>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-devel@nongnu.org, Greg McGary <greg.mcgary@gmail.com>

On Wed, May 25, 2011 at 10:20 PM, Peter Maydell
<peter.maydell@linaro.org> wrote:
> On 25 May 2011 19:44, Greg McGary <greg.mcgary@gmail.com> wrote:
>> I would like to create a QEMU model of an SoC that has several
>> CPU cores having different architectures. =C2=A0I'm guessing this
>> can be done.
>
> It's not supported currently as far as I'm aware. There was
> at least one paper at the QEMU Forum earlier this year describing
> an approach to multi-CPU environments (embedding QEMU into a
> SystemC world) that basically saved and restored all QEMU's
> global variables every time it switched cores...
>
> It would be good if it was supported in QEMU proper, but I
> suspect you may be in for some large-scale restructuring work.

One of the long standing goals for QEMU has been to be able to use a
single executable to emulate multiple architectures. I think for
example the lines like
#define cpu_init cpu_sparc_init
#define cpu_exec cpu_sparc_exec
etc. stand for this purpose, so there has been some consideration for this.