From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=41248 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Q7Aeu-0001iY-OG for qemu-devel@nongnu.org; Tue, 05 Apr 2011 14:07:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Q7Aet-0003aw-On for qemu-devel@nongnu.org; Tue, 05 Apr 2011 14:07:20 -0400 Received: from mail-vw0-f45.google.com ([209.85.212.45]:48791) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Q7Aet-0003ap-Ho for qemu-devel@nongnu.org; Tue, 05 Apr 2011 14:07:19 -0400 Received: by vws17 with SMTP id 17so569185vws.4 for ; Tue, 05 Apr 2011 11:07:19 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <4D9AC719.8090301@redhat.com> References: <1301930887-20705-1-git-send-email-avi@redhat.com> <20110404155917.GA13423@redhat.com> <4D99F061.1090208@codemonkey.ws> <4D99F34D.3060804@redhat.com> <4D9AC719.8090301@redhat.com> From: Blue Swirl Date: Tue, 5 Apr 2011 21:06:59 +0300 Message-ID: Subject: Re: [Qemu-devel] Re: [PATCH 00/10] pci: pci_register_bar_simple Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Avi Kivity Cc: qemu-devel@nongnu.org, "Michael S. Tsirkin" On Tue, Apr 5, 2011 at 10:39 AM, Avi Kivity wrote: > On 04/04/2011 08:02 PM, Blue Swirl wrote: >> >> On Mon, Apr 4, 2011 at 7:35 PM, Avi Kivity =C2=A0wrote: >> > =C2=A0On 04/04/2011 07:22 PM, Anthony Liguori wrote: >> >> >> >> =C2=A0On 04/04/2011 10:59 AM, Michael S. Tsirkin wrote: >> >>> >> >>> =C2=A0On Mon, Apr 04, 2011 at 06:27:57PM +0300, Avi Kivity wrote: >> >>>> >> >>>> =C2=A0Many PCI BARs that use the memory address space map a single = MMIO >> >>>> region >> >>>> =C2=A0into >> >>>> =C2=A0the entire BAR range. =C2=A0Introduce an API pci_register_bar= _simple() >> >>>> for >> >>>> =C2=A0that use >> >>>> =C2=A0case, and convert all users where this can be done trivially. >> >>>> >> >>>> =C2=A0This will reduce the work required to introduce a PCI memory = API; >> >>>> it's >> >>>> =C2=A0also >> >>>> =C2=A0a nice code reduction in its own right. >> >>> >> >>> =C2=A0This will save some code, so >> >>> =C2=A0Acked-by: Michael S. Tsirkin >> >>> >> >>> =C2=A0I really hope the rest of devices will follow. >> >> >> >> =C2=A0How complete is this? >> > >> > =C2=A0I converted all devices which were easy to convert. =C2=A0There = may be one >> > or two >> > =C2=A0more that can be converted with additional work (and perhaps wit= h an >> > =C2=A0additional pic_bar_get_current_address() API, and a >> > pci_bar_set_coalescing() >> > =C2=A0API). =C2=A0The rest likely need to stick with the callback-base= d API. >> >> In my version which I sent earlier but didn't commit, also other BARs >> besides the first one and also tricky devices like VGA were handled. >> >> But I didn't commit it because I felt it was not going to right >> direction. I think the BARs should be specified in PCIDeviceInfo >> instead of adding more function calls. The same applies to this patch >> set. > > The more complicated BARs cannot be described declaratively (at least > without a lot of complicated infrastructure). =C2=A0They can switch from = RAM to > MMIO mappings at runtime, and have different sub-regions. Subregions should be possible, but I agree run time switch will not. Those should be pretty rare, though.