Re: [Qemu-devel] [PATCH 4/5] sparc64: fix mmu context at trap levels above zero

[Igor Kovalenko <igor.v.kovalenko@gmail.com>]

On Mon, Apr 4, 2011 at 10:37 PM, Blue Swirl <blauwirbel@gmail.com> wrote:
> On Mon, Apr 4, 2011 at 8:25 PM, Artyom Tarasenko <atar4qemu@gmail.com> wrote:
>> On Sat, May 22, 2010 at 12:52 PM, Igor V. Kovalenko
>> <igor.v.kovalenko@gmail.com> wrote:
>>> --- a/target-sparc/helper.c
>>> +++ b/target-sparc/helper.c
>>> @@ -572,6 +572,23 @@ static int get_physical_address(CPUState *env, target_phys_addr_t *physical,
>>>     /* ??? We treat everything as a small page, then explicitly flush
>>>        everything when an entry is evicted.  */
>>>     *page_size = TARGET_PAGE_SIZE;
>>> +
>>> +#if defined (DEBUG_MMU)
>>> +    /* safety net to catch wrong softmmu index use from dynamic code */
>>
>> What does "wrong softmmu index" mean? Is it an error or an indication
>> that something is not implemented?
>> I'm hitting this net with the following message:
>
> The warning is not correct for CPUs without hypervisor mode. On T1/T2,
> the default access mode when TL > 1 is hypervisor or nucleus mode.
> Even then, the hypervisor could perform some accesses with kernel or
> user ASIs.

Right.

The warning is still good for CODE access. Check itself was intended
to catch reusing translated block of user or kernel mode after
entering trap so it must be corrected.

-- 
Kind regards,
Igor V. Kovalenko