From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:45819) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QEmYl-0007iX-3z for qemu-devel@nongnu.org; Tue, 26 Apr 2011 14:00:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QEmYj-0004J7-TK for qemu-devel@nongnu.org; Tue, 26 Apr 2011 14:00:27 -0400 Received: from mail-vx0-f173.google.com ([209.85.220.173]:49462) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QEmYj-0004Iy-Qz for qemu-devel@nongnu.org; Tue, 26 Apr 2011 14:00:25 -0400 Received: by vxb41 with SMTP id 41so755147vxb.4 for ; Tue, 26 Apr 2011 11:00:25 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <4DB68768.3050700@siemens.com> References: <4DB68768.3050700@siemens.com> From: Blue Swirl Date: Tue, 26 Apr 2011 21:00:05 +0300 Message-ID: Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [PATCH] target-i386: Initialize CPUState::halted in cpu_reset List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Jan Kiszka Cc: qemu-devel On Tue, Apr 26, 2011 at 11:50 AM, Jan Kiszka wrote: > Instead of having an extra reset function at machine level and special > code for processing INIT, move the initialization of halted into the > cpu reset handler. Nack. A CPU is designated as a BSP at board level. CPUs do not need to know about this at all.