From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:50694) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QWEtV-0006Fh-0D for qemu-devel@nongnu.org; Mon, 13 Jun 2011 17:42:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QWEtT-0003tC-1t for qemu-devel@nongnu.org; Mon, 13 Jun 2011 17:42:00 -0400 Received: from mail-pw0-f45.google.com ([209.85.160.45]:54334) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QWEtS-0003sz-O4 for qemu-devel@nongnu.org; Mon, 13 Jun 2011 17:41:58 -0400 Received: by pwi6 with SMTP id 6so2414182pwi.4 for ; Mon, 13 Jun 2011 14:41:57 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <1306427651-3547-1-git-send-email-peter.maydell@linaro.org> References: <1306427651-3547-1-git-send-email-peter.maydell@linaro.org> Date: Mon, 13 Jun 2011 22:41:57 +0100 Message-ID: From: Peter Maydell Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH] hw/9118.c: Implement active-low interrupt support List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: patches@linaro.org Ping? On 26 May 2011 17:34, Peter Maydell wrote: > The 9118 ethernet controller interrupt line is active low unless > the IRQ config register is programmed to set both the IRQ_POL > (polarity: active-high) and IRQ_TYPE (type: push-pull) bits: > implement support for inverting the irq output in other configurations. > This also requires that we support setting the bits in the first > place, and that we correctly preserve them across software reset. > > Signed-off-by: Peter Maydell > --- > The motivation for this patch is actually an omap3 platform (overo) > which uses the active-low configuration; the platforms in QEMU > mainline which use it (vexpress and realview) both configure the > chip to active-high, which is why this bug hasn't come to light > before. I've tested that (a) my overo platform works with the > change and (b) it doesn't regress vexpress. > > =C2=A0hw/lan9118.c | =C2=A0 12 +++++++++--- > =C2=A01 files changed, 9 insertions(+), 3 deletions(-) > > diff --git a/hw/lan9118.c b/hw/lan9118.c > index 4c42fe9..3f3c05d 100644 > --- a/hw/lan9118.c > +++ b/hw/lan9118.c > @@ -228,6 +228,12 @@ static void lan9118_update(lan9118_state *s) > =C2=A0 =C2=A0 if ((s->irq_cfg & IRQ_EN) =3D=3D 0) { > =C2=A0 =C2=A0 =C2=A0 =C2=A0 level =3D 0; > =C2=A0 =C2=A0 } > + =C2=A0 =C2=A0if ((s->irq_cfg & (IRQ_TYPE | IRQ_POL)) !=3D (IRQ_TYPE | I= RQ_POL)) { > + =C2=A0 =C2=A0 =C2=A0 =C2=A0/* Interrupt is active low unless we're conf= igured as > + =C2=A0 =C2=A0 =C2=A0 =C2=A0 * active-high polarity, push-pull type. > + =C2=A0 =C2=A0 =C2=A0 =C2=A0 */ > + =C2=A0 =C2=A0 =C2=A0 =C2=A0level =3D !level; > + =C2=A0 =C2=A0} > =C2=A0 =C2=A0 qemu_set_irq(s->irq, level); > =C2=A0} > > @@ -294,8 +300,7 @@ static void phy_reset(lan9118_state *s) > =C2=A0static void lan9118_reset(DeviceState *d) > =C2=A0{ > =C2=A0 =C2=A0 lan9118_state *s =3D FROM_SYSBUS(lan9118_state, sysbus_from= _qdev(d)); > - > - =C2=A0 =C2=A0s->irq_cfg &=3D ~(IRQ_TYPE | IRQ_POL); > + =C2=A0 =C2=A0s->irq_cfg &=3D (IRQ_TYPE | IRQ_POL); > =C2=A0 =C2=A0 s->int_sts =3D 0; > =C2=A0 =C2=A0 s->int_en =3D 0; > =C2=A0 =C2=A0 s->fifo_int =3D 0x48000000; > @@ -904,7 +909,8 @@ static void lan9118_writel(void *opaque, target_phys_= addr_t offset, > =C2=A0 =C2=A0 switch (offset) { > =C2=A0 =C2=A0 case CSR_IRQ_CFG: > =C2=A0 =C2=A0 =C2=A0 =C2=A0 /* TODO: Implement interrupt deassertion inte= rvals. =C2=A0*/ > - =C2=A0 =C2=A0 =C2=A0 =C2=A0s->irq_cfg =3D (s->irq_cfg & IRQ_INT) | (val= & IRQ_EN); > + =C2=A0 =C2=A0 =C2=A0 =C2=A0val &=3D (IRQ_EN | IRQ_POL | IRQ_TYPE); > + =C2=A0 =C2=A0 =C2=A0 =C2=A0s->irq_cfg =3D (s->irq_cfg & IRQ_INT) | val; > =C2=A0 =C2=A0 =C2=A0 =C2=A0 break; > =C2=A0 =C2=A0 case CSR_INT_STS: > =C2=A0 =C2=A0 =C2=A0 =C2=A0 s->int_sts &=3D ~val; > -- > 1.7.1