Re: [Qemu-devel] [Bug 796202] [NEW] Doing a 64 bit load from a 32 bit local APIC register is allowed

[Blue Swirl <blauwirbel@gmail.com>]

On Sun, Jun 12, 2011 at 4:03 PM, Robert Uhl <796202@bugs.launchpad.net> wrote:
> Public bug reported:
>
> Doing
>
> u64 lapic_idregister = (u64) fix_to_virt(FIX_APIC_BASE) + 0x20;
>
> and later in an interrupt handler
>
> movq (lapic_idregister), %rcx
> movq (%rcx), %rcx
>
> in a linux kernel module works in qemu 0.13.91 but not on real hardware (it simply reboots).
> On real hardware only
>
> movl (%rcx), %ecx
>
> works (also in qemu).

Thank you for the report. Currently QEMU devices only provide access
methods up to 32 bits, a 64 bit access is emulated with two 32 bit
accesses. So it is not possible to handle a 32 bit access differently
from a 64 bit one for now.

So far this hasn't been considered to be a problem for x86, though it
is clearly not correct for Sparc and Alpha. This report shows that it
is necessary to add 64 bit access methods (or otherwise handle 64 bit
accesses more realistically) since x86 is also affected.

Adding the 64 bit method would be a major refactoring though and there
are other designs possible.