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From: Max Filippov <jcmvbkbc@gmail.com>
To: Richard Henderson <rth@twiddle.net>
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 19/26] target-xtensa: implement loop option
Date: Fri, 20 May 2011 13:10:33 +0400	[thread overview]
Message-ID: <BANLkTimQSPxhtS4nU9kTRWCWWtiw8wCpwg@mail.gmail.com> (raw)
In-Reply-To: <201105201125.16972.jcmvbkbc@gmail.com>

>> > +    if (env->sregs[LEND] != v) {
>> > +        tb_invalidate_phys_page_range(
>> > +                env->sregs[LEND] - 1, env->sregs[LEND], 0);
>> > +        env->sregs[LEND] = v;
>> > +        tb_invalidate_phys_page_range(
>> > +                env->sregs[LEND] - 1, env->sregs[LEND], 0);
>> > +    }
>>
>> Why are you invalidating twice?
>
> TB at the old LEND and at the new. Although it will work correctly without first invalidation.
>
>> > +static void gen_check_loop_end(DisasContext *dc, int slot)
>> > +{
>> > +    if (option_enabled(dc, XTENSA_OPTION_LOOP) &&
>> > +            !(dc->tb->flags & XTENSA_TBFLAG_EXCM) &&
>> > +            dc->next_pc == dc->lend) {
>> > +        int label = gen_new_label();
>> > +
>> > +        tcg_gen_brcondi_i32(TCG_COND_NE, cpu_SR[LEND], dc->next_pc, label);
>> > +        tcg_gen_brcondi_i32(TCG_COND_EQ, cpu_SR[LCOUNT], 0, label);
>> > +        tcg_gen_subi_i32(cpu_SR[LCOUNT], cpu_SR[LCOUNT], 1);
>> > +        gen_jump(dc, cpu_SR[LBEG]);
>> > +        gen_set_label(label);
>> > +        gen_jumpi(dc, dc->next_pc, slot);
>>
>> If you're going to pretend that LEND is a constant, you might as well
>> pretend that LBEG is also a constant, so that you get to chain the TB's
>> around the loop.
>
> But there may be three exits from TB at the LEND if its last command is a branch: to the LBEG, to the branch target and to the next insn.

Ok, I guess that I need to add gen_wsr_lbeg that invalidates TB at the
current LEND, pretend that LBEG is constant and use given slot to jump
to it. And also to get rid of tcg_gen_brcondi_i32(TCG_COND_NE,
cpu_SR[LEND], dc->next_pc, label);

-- 
Thanks.
-- Max

  reply	other threads:[~2011-05-20  9:10 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-05-17 22:32 [Qemu-devel] [PATCH 00/26] target-xtensa: introduce new target architecture Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 01/26] target-xtensa: add target stubs Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 02/26] target-xtensa: add target to the configure script Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 03/26] target-xtensa: implement disas_xtensa_insn Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 04/26] target-xtensa: implement narrow instructions Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 05/26] target-xtensa: implement RT0 group Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 06/26] target-xtensa: add sample board Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 07/26] target-xtensa: implement conditional jumps Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 08/26] target-xtensa: implement JX/RET0/CALLX Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 09/26] target-xtensa: add special and user registers Max Filippov
2011-05-19 20:59   ` Richard Henderson
2011-05-20  7:34     ` Max Filippov
2011-05-20 14:18       ` Richard Henderson
2011-05-17 22:32 ` [Qemu-devel] [PATCH 10/26] target-xtensa: implement RST3 group Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 11/26] target-xtensa: implement shifts (ST1 and RST1 groups) Max Filippov
2011-05-19 21:15   ` Richard Henderson
2011-05-17 22:32 ` [Qemu-devel] [PATCH 12/26] target-xtensa: implement LSAI group Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 13/26] target-xtensa: mark reserved and TBD opcodes Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 14/26] target-xtensa: implement SYNC group Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 15/26] target-xtensa: implement CACHE group Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 16/26] target-xtensa: implement exceptions Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 17/26] target-xtensa: implement RST2 group (32 bit mul/div/rem) Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 18/26] target-xtensa: implement windowed registers Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 19/26] target-xtensa: implement loop option Max Filippov
2011-05-19 21:51   ` Richard Henderson
2011-05-20  7:25     ` Max Filippov
2011-05-20  9:10       ` Max Filippov [this message]
2011-05-20 14:14         ` Richard Henderson
2011-05-17 22:32 ` [Qemu-devel] [PATCH 20/26] target-xtensa: implement extended L32R Max Filippov
2011-05-19 22:00   ` Richard Henderson
2011-05-20  7:14     ` Max Filippov
2011-05-20 15:30       ` Richard Henderson
2011-05-17 22:32 ` [Qemu-devel] [PATCH 21/26] target-xtensa: implement unaligned exception option Max Filippov
2011-05-19 22:04   ` Richard Henderson
2011-05-22 12:10     ` Max Filippov
2011-05-22 16:57       ` Richard Henderson
2011-05-22 20:12         ` Max Filippov
2011-05-23 13:51           ` Richard Henderson
2011-05-23 23:20             ` Max Filippov
2011-05-24 14:57               ` Richard Henderson
2011-05-17 22:32 ` [Qemu-devel] [PATCH 22/26] target-xtensa: implement SIMCALL Max Filippov
2011-05-19 22:07   ` Richard Henderson
2011-05-17 22:32 ` [Qemu-devel] [PATCH 23/26] target-xtensa: implement interrupt option Max Filippov
2011-05-20 15:44   ` Richard Henderson
2011-05-20 20:05     ` Max Filippov
2011-05-20 20:49       ` Richard Henderson
2011-05-20 21:30         ` Max Filippov
2011-05-20 22:19           ` Richard Henderson
2011-05-24 10:28             ` Max Filippov
2011-05-24 14:59               ` Richard Henderson
2011-05-24 15:11                 ` Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 24/26] target-xtensa: implement accurate window check Max Filippov
2011-05-20 15:58   ` Richard Henderson
2011-05-20 19:04     ` Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 25/26] target-xtensa: implement CPENABLE and PRID SRs Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 26/26] target-xtensa: implement relocatable vectors Max Filippov

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