From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=52176 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Q90mp-0004Ky-DX for qemu-devel@nongnu.org; Sun, 10 Apr 2011 15:59:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Q90mn-00033v-Ty for qemu-devel@nongnu.org; Sun, 10 Apr 2011 15:59:07 -0400 Received: from mail-gx0-f173.google.com ([209.85.161.173]:35169) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Q90mn-00033i-Rf for qemu-devel@nongnu.org; Sun, 10 Apr 2011 15:59:05 -0400 Received: by gxk26 with SMTP id 26so2449472gxk.4 for ; Sun, 10 Apr 2011 12:59:05 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <1302462807-8795-4-git-send-email-aurelien@aurel32.net> References: <1302462807-8795-1-git-send-email-aurelien@aurel32.net> <1302462807-8795-4-git-send-email-aurelien@aurel32.net> Date: Sun, 10 Apr 2011 20:59:04 +0100 Message-ID: From: Peter Maydell Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] Re: [PATCH 4/5] softfloat: add float{32, 64, x80, 128}_unordered() functions List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Aurelien Jarno Cc: qemu-devel@nongnu.org On 10 April 2011 20:13, Aurelien Jarno wrote: > Add float{32,64,x80,128}_unordered() functions to softfloat, matching > the softfloat-native ones. This allow target-i386/ops_sse.h to be > compiled with softfloat. I guess you could have made the x86 target use float*_compare() instead, but I agree that it makes sense to have the unordered() comparison to match the other specific-comparison ops. > =C2=A0/*-----------------------------------------------------------------= ----------- > +| Returns 1 if the single-precision floating-point values `a' and `b' ca= nnot > +| be compared, and 0 otherwise. The comparison is performed according to= the > +| IEC/IEEE Standard for Binary Floating-Point Arithmetic. > +*-----------------------------------------------------------------------= -----*/ > + > +int float32_unordered( float32 a, float32 b STATUS_PARAM ) > +{ > + =C2=A0 =C2=A0a =3D float32_squash_input_denormal(a STATUS_VAR); > + =C2=A0 =C2=A0b =3D float32_squash_input_denormal(b STATUS_VAR); > + > + =C2=A0 =C2=A0if ( =C2=A0 =C2=A0( ( extractFloat32Exp( a ) =3D=3D 0xFF )= && extractFloat32Frac( a ) ) > + =C2=A0 =C2=A0 =C2=A0 =C2=A0 || ( ( extractFloat32Exp( b ) =3D=3D 0xFF )= && extractFloat32Frac( b ) ) > + =C2=A0 =C2=A0 =C2=A0 ) { > + =C2=A0 =C2=A0 =C2=A0 =C2=A0if ( float32_is_signaling_nan( a ) || float3= 2_is_signaling_nan( b ) ) { > + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0float_raise( float_flag_invali= d STATUS_VAR); > + =C2=A0 =C2=A0 =C2=A0 =C2=A0} > + =C2=A0 =C2=A0 =C2=A0 =C2=A0return 1; > + =C2=A0 =C2=A0} > + > + =C2=A0 =C2=A0return 0; > +} So the NaN signalling semantics here are that we raise Invalid for an SNaN but not for a QNaN. That's correct for the x86 op we're implementing, but the float*_lt, _le and _compare functions use the _quiet suffix for these semantics (with plain float*_lt etc being "raise Invalid for both QNaN and SNaN"). So I think these functions should be float*_unordered_quiet(). Annoyingly for eq the two versions use a different convention, so we have float*_eq [raise Invalid only if SNaN] and float*_eq_signaling [for any NaN] -- ideally that inconsistency should be fixed... > +int float64_unordered( float64 a, float64 b STATUS_PARAM ) > +{ > + =C2=A0 =C2=A0a =3D float64_squash_input_denormal(a STATUS_VAR); > + =C2=A0 =C2=A0b =3D float64_squash_input_denormal(b STATUS_VAR); > + > + =C2=A0 =C2=A0if ( =C2=A0 =C2=A0( ( extractFloat64Exp( a ) =3D=3D 0x7FF = ) && extractFloat64Frac( a ) ) > + =C2=A0 =C2=A0 =C2=A0 =C2=A0 || ( ( extractFloat64Exp( b ) =3D=3D 0x7FF = ) && extractFloat64Frac( b ) ) > + =C2=A0 =C2=A0 =C2=A0 ) { > + =C2=A0 =C2=A0 =C2=A0 =C2=A0if ( float64_is_signaling_nan( a ) || float6= 4_is_signaling_nan( b ) ) { > + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0float_raise( float_flag_invali= d STATUS_VAR); > + =C2=A0 =C2=A0 =C2=A0 =C2=A0} > + =C2=A0 =C2=A0 =C2=A0 =C2=A0return 0; > + =C2=A0 =C2=A0} > + =C2=A0 =C2=A0return 1; > +} You've got the sense the wrong way round on this one, I think. I note that target-mips has a private float32_is_unordered() and float64_is_unordered() which could probably be cleaned up to use these instead. You'd need to implement both the float*_unordered() and float*_unordered_quiet() versions. -- PMM