Re: [Qemu-devel] [PATCH v3 0/7] Let boards state maximum RAM limits in QEMUMachine struct

[Peter Maydell <peter.maydell@linaro.org>]

On 4 April 2011 15:53, Jes Sorensen <Jes.Sorensen@redhat.com> wrote:
> I understand that what you are proposing seems to work well enough for
> your problem at hand. What I am saying is that adding a mechanism like
> that, can cause problems for adding a more generic mechanism that
> handles more advanced boards in the future. I much prefer a generic
> solution than a simple hack.

I don't think it's a hack. I think it's a reasonably clean solution
to the set of cases we've actually encountered in practice, and I
think trying to design something more generalised without actually
having a use case to tie it to is just going to produce something
complicated which doesn't turn out to actually be what a hypothetical
"advanced board" will actually need. I think we're much better off
with code that does what we need it to do now, and designing
and implementing the complicated generic framework only when we
actually need it.

>> If you have a concrete example of multiple boards which we currently model
>> and which require this level of flexibility to avoid odd misbehaviour trying
>> to run a guest, then please point them out and I'll look at expanding the
>> patch to cover their requirements.
>>
>> If this is just a theoretical issue, then I think we should only add the
>> extra generic framework code if and when we turn out to need it.
>
> As I pointed out before, this is not a theoretical problem, most numa
> systems have this issue, including many x86 boxes. I can see the problem
> also existing with mips boards like the sb1250 ones I worked on many
> years ago.

OK, so presumably you can provide a qemu command line and an image
which demonstrates the problem...

> Having an a table of valid ram locations for a board

...I'm not sure this is even meaningful for boards where you can remap
the RAM to different physical addresses at runtime (versatile express
ought to do this although we don't currently model that bit).

-- PMM