From: Peter Maydell <peter.maydell@linaro.org>
To: Blue Swirl <blauwirbel@gmail.com>
Cc: Bob Breuer <breuerr@mc.net>, qemu-devel <qemu-devel@nongnu.org>,
Robert Reif <reif@earthlink.net>
Subject: Re: [Qemu-devel] [PATCH] Sparc32: dummy implementation of MXCC MMU breakpoint registers
Date: Sat, 18 Jun 2011 23:11:31 +0100 [thread overview]
Message-ID: <BANLkTinh0zJQ+EOviHADEoo3toJTsjs3mg@mail.gmail.com> (raw)
In-Reply-To: <BANLkTi=A9TDUUp=_XZa6JZzTEsbz=iVuhw@mail.gmail.com>
On 18 June 2011 22:45, Blue Swirl <blauwirbel@gmail.com> wrote:
> Add dummy registers for SuperSPARC MXCC MMU counter breakpoints.
>
> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
> diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
> index 320530e..b5d5291 100644
> --- a/target-sparc/cpu.h
> +++ b/target-sparc/cpu.h
> @@ -403,6 +403,7 @@ typedef struct CPUSPARCState {
> uint32_t mmuregs[32];
> uint64_t mxccdata[4];
> uint64_t mxccregs[8];
> + uint32_t mmubpctrv, mmubpctrc, mmubpctrs, mmubpaction;
> uint64_t mmubpregs[4];
> uint64_t prom_addr;
> #endif
Shouldn't there be a corresponding change to target-sparc/machine.c
adding these to cpu_save()/cpu_load() ? [the existing mxccdata,
mxccregs, mmubpregs don't seem to be saved/restored either...]
-- PMM
next prev parent reply other threads:[~2011-06-18 22:11 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-06-18 21:45 [Qemu-devel] [PATCH] Sparc32: dummy implementation of MXCC MMU breakpoint registers Blue Swirl
2011-06-18 22:11 ` Peter Maydell [this message]
2011-06-18 22:41 ` Robert Reif
-- strict thread matches above, loose matches on Subject: below --
2011-06-19 13:22 Blue Swirl
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