From: C.W. Betts <computers57@hotmail.com>
To: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [RFC] OSX/ppc64 TCG support
Date: Fri, 10 Apr 2009 21:34:17 -0600 [thread overview]
Message-ID: <BAY110-DAV24C5DA51F90D29264ADE4B9810@phx.gbl> (raw)
Message-ID: <A3BEB1B2-95F6-4E26-87FD-B58DA752C9C8@hotmail.com> (raw)
In-Reply-To: <FCC0D0FA-C92B-43BC-97DC-9105533336FA@web.de>
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On Apr 10, 2009, at 4:34 PM, Andreas Färber wrote:
> Hello,
>
> I've tried to add TCG backend support for Mac OS X ppc64 with
> limited success. It seems the linkage area and LR offset are the
> same as on Linux, so the main difference I could find was the
> register usage.
>
> This brought up two questions:
>
> i) In ppc/tcg-target.c TCG_REG_R2 is listed twice in
> tcg_target_reg_alloc_order for __APPLE__. I assume this is not
> intended? It does so far work with or without this patch eliminating
> the second use:
>
> diff --git a/tcg/ppc/tcg-target.c b/tcg/ppc/tcg-target.c
> index 23f94a8..7607d85 100644
> --- a/tcg/ppc/tcg-target.c
> +++ b/tcg/ppc/tcg-target.c
> @@ -114,7 +114,9 @@ static const int tcg_target_reg_alloc_order[] = {
> #endif
> TCG_REG_R0,
> TCG_REG_R1,
> +#ifndef __APPLE__
> TCG_REG_R2,
> +#endif
> TCG_REG_R24,
> TCG_REG_R25,
> TCG_REG_R26,
>
> Alternatively, if the order of r2 does not matter too much, we could
> remove the initial __APPLE__ section instead for simplicity.
>
> ii) In ppc64/tcg-target.c tcg_target_call_oarg_regs is declared with
> a length of 2 but only contains one register. Intended?
>
> diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
> index a96314c..2a8eaec 100644
> --- a/tcg/ppc64/tcg-target.c
> +++ b/tcg/ppc64/tcg-target.c
> @@ -125,11 +134,15 @@ static const int tcg_target_call_iarg_regs[] = {
> TCG_REG_R10
> };
>
> -static const int tcg_target_call_oarg_regs[2] = {
> +static const int tcg_target_call_oarg_regs[1] = {
> TCG_REG_R3
> };
>
>
> Then for the real OSX/ppc64 changes, I have marked r11 and r13
> callee-saved, like for OSX/ppc.
> Reference: http://developer.apple.com/documentation/DeveloperTools/Conceptual/LowLevelABI/110-64-bit_PowerPC_Function_Calling_Conventions/64bitPowerPC.html
>
> To my knowledge in ppc64 mode (at least on the G5) the lmw and stmw
> instructions are illegal. We should probably remove their
> definitions, they are not currently being used in the ppc64 backend.
>
> Unfortunately qemu-system-ppc still crashes immediately, any hints
> welcome.
>
> Program received signal EXC_BAD_INSTRUCTION, Illegal instruction/
> operand.
> 0x00000000005a9680 in code_gen_prologue ()
> (gdb) bt
> #0 0x00000000005a9680 in code_gen_prologue ()
> #1 0x00000000000c5ba0 in cpu_ppc_exec (env1=<value temporarily
> unavailable, due to optimizations>) at /Users/andreas/Q/qemu/cpu-
> exec.c:622
> #2 0x000000000000a208 in qemu_main (argc=<value temporarily
> unavailable, due to optimizations>, argv=<value temporarily
> unavailable, due to optimizations>, envp=<value temporarily
> unavailable, due to optimizations>) at /Users/andreas/Q/qemu/vl.c:3828
> #3 0x00000000000b2788 in -[QemuCocoaAppController
> startEmulationWithArgc:argv:] (self=<value temporarily unavailable,
> due to optimizations>, _cmd=<value temporarily unavailable, due to
> optimizations>, argc=<value temporarily unavailable, due to
> optimizations>, argv=<value temporarily unavailable, due to
> optimizations>) at /Users/andreas/Q/qemu/cocoa.m:780
> #4 0x00007fff81b3ff08 in _nsnote_callback ()
> #5 0x00007fff8104fd34 in _CFXNotificationPostNotification ()
> #6 0x00007fff81b3c970 in -[NSNotificationCenter
> postNotificationName:object:userInfo:] ()
> #7 0x00007fff81b476e0 in -[NSNotificationCenter
> postNotificationName:object:] ()
> #8 0x00007fff81f58e24 in -[NSApplication
> _postDidFinishNotification] ()
> #9 0x00007fff81f58ce4 in -[NSApplication
> _sendFinishLaunchingNotification] ()
> #10 0x00007fff81eaf02c in -[NSApplication(NSAppleEventHandling)
> _handleAEOpen:] ()
> #11 0x00007fff81eae51c in -[NSApplication(NSAppleEventHandling)
> _handleCoreEvent:withReplyEvent:] ()
> #12 0x00007fff81b6bbe0 in -[NSAppleEventManager
> dispatchRawAppleEvent:withRawReply:handlerRefCon:] ()
> #13 0x00007fff81b6b974 in _NSAppleEventManagerGenericHandler ()
> #14 0x000000010067708c in aeDispatchAppleEvent ()
> #15 0x000000010065f810 in dispatchEventAndSendReply ()
> #16 0x000000010065f5cc in aeProcessAppleEvent ()
> #17 0x00007fff843962dc in AEProcessAppleEvent ()
> #18 0x00007fff81eaaf68 in _DPSNextEvent ()
> #19 0x00007fff81eaa49c in -[NSApplication
> nextEventMatchingMask:untilDate:inMode:dequeue:] ()
> #20 0x00007fff81ea185c in -[NSApplication run] ()
> #21 0x00000000000b346c in main (argc=<value temporarily unavailable,
> due to optimizations>, argv=<value temporarily unavailable, due to
> optimizations>) at /Users/andreas/Q/qemu/cocoa.m:905
> (gdb) q
Try using i386-softmmu as a test base. It is more stable and better
supported.
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next prev parent reply other threads:[~2009-04-11 3:34 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-04-10 22:34 [Qemu-devel] [RFC] OSX/ppc64 TCG support Andreas Färber
[not found] ` <A3BEB1B2-95F6-4E26-87FD-B58DA752C9C8@hotmail.com>
2009-04-11 3:34 ` C.W. Betts [this message]
2009-04-11 7:22 ` [Qemu-devel] " malc
2009-04-11 8:24 ` Andreas Färber
2009-04-11 9:51 ` malc
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