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[2003:fa:af0b:b200:150f:11b7:b1e9:e208]) by smtp.gmail.com with ESMTPSA id s9-20020a5d5109000000b002421ce6a275sm7199911wrt.114.2022.12.11.16.02.47 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 11 Dec 2022 16:02:47 -0800 (PST) Date: Mon, 12 Dec 2022 00:02:42 +0000 From: Bernhard Beschow To: =?ISO-8859-1?Q?Philippe_Mathieu-Daud=E9?= , qemu-devel@nongnu.org CC: Paolo Bonzini , Jiaxun Yang , =?ISO-8859-1?Q?Daniel_P=2E_Berrang=E9?= , Thomas Huth , =?ISO-8859-1?Q?Marc-Andr=E9_Lureau?= , Aurelien Jarno , =?ISO-8859-1?Q?Philippe_Mathieu-Daud=E9?= Subject: Re: [PATCH-for-8.0 7/7] hw/mips/gt64xxx_pci: Move it to hw/pci-host/ In-Reply-To: <20221209151533.69516-8-philmd@linaro.org> References: <20221209151533.69516-1-philmd@linaro.org> <20221209151533.69516-8-philmd@linaro.org> Message-ID: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=shentey@gmail.com; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Am 9=2E Dezember 2022 15:15:33 UTC schrieb "Philippe Mathieu-Daud=C3=A9" <= philmd@linaro=2Eorg>: >From: Philippe Mathieu-Daud=C3=A9 > >The GT-64120 is a north-bridge, and it is not MIPS specific=2E >Move it with the other north-bridge devices=2E > >Signed-off-by: Philippe Mathieu-Daud=C3=A9 >--- > MAINTAINERS | 2 +- > hw/mips/Kconfig | 6 ------ > hw/mips/meson=2Ebuild | 1 - > hw/mips/trace-events | 6 ------ > hw/pci-host/Kconfig | 6 ++++++ > hw/{mips/gt64xxx_pci=2Ec =3D> pci-host/gt64120=2Ec} | 0 > hw/pci-host/meson=2Ebuild | 1 + > hw/pci-host/trace-events | 7 +++++++ > meson=2Ebuild | 1 - > 9 files changed, 15 insertions(+), 15 deletions(-) > delete mode 100644 hw/mips/trace-events > rename hw/{mips/gt64xxx_pci=2Ec =3D> pci-host/gt64120=2Ec} (100%) > >diff --git a/MAINTAINERS b/MAINTAINERS >index 6966490c94=2E=2Ee558b53e85 100644 >--- a/MAINTAINERS >+++ b/MAINTAINERS >@@ -1226,7 +1226,7 @@ S: Odd Fixes > F: hw/isa/piix4=2Ec > F: hw/acpi/piix4=2Ec > F: hw/mips/malta=2Ec >-F: hw/mips/gt64xxx_pci=2Ec >+F: hw/pci-host/gt64120=2Ec > F: include/hw/southbridge/piix=2Eh > F: tests/avocado/linux_ssh_mips_malta=2Epy > F: tests/avocado/machine_mips_malta=2Epy >diff --git a/hw/mips/Kconfig b/hw/mips/Kconfig >index 8f7bce38fb=2E=2E7a55143f8a 100644 >--- a/hw/mips/Kconfig >+++ b/hw/mips/Kconfig >@@ -60,9 +60,3 @@ config MIPS_BOSTON >=20 > config FW_CFG_MIPS > bool >- >-config GT64120 >- bool >- select PCI >- select EMPTY_SLOT >- select I8259 >diff --git a/hw/mips/meson=2Ebuild b/hw/mips/meson=2Ebuild >index 152103f15f=2E=2E900613fc08 100644 >--- a/hw/mips/meson=2Ebuild >+++ b/hw/mips/meson=2Ebuild >@@ -3,7 +3,6 @@ mips_ss=2Eadd(files('bootloader=2Ec', 'mips_int=2Ec')) > mips_ss=2Eadd(when: 'CONFIG_FW_CFG_MIPS', if_true: files('fw_cfg=2Ec')) > mips_ss=2Eadd(when: 'CONFIG_LOONGSON3V', if_true: files('loongson3_bootp= =2Ec', 'loongson3_virt=2Ec')) > mips_ss=2Eadd(when: 'CONFIG_MALTA', if_true: files('malta=2Ec')) >-softmmu_ss=2Eadd(when: 'CONFIG_GT64120', if_true: files('gt64xxx_pci=2Ec= ')) > mips_ss=2Eadd(when: 'CONFIG_MIPS_CPS', if_true: files('cps=2Ec')) >=20 > if 'CONFIG_TCG' in config_all >diff --git a/hw/mips/trace-events b/hw/mips/trace-events >deleted file mode 100644 >index 13ee731a48=2E=2E0000000000 >--- a/hw/mips/trace-events >+++ /dev/null >@@ -1,6 +0,0 @@ >-# gt64xxx_pci=2Ec >-gt64120_read(uint64_t addr, uint64_t value) "gt64120 read 0x%03"PRIx64" = value:0x%08" PRIx64 >-gt64120_write(uint64_t addr, uint64_t value) "gt64120 write 0x%03"PRIx64= " value:0x%08" PRIx64 >-gt64120_read_intreg(const char *regname, unsigned size, uint64_t value) = "gt64120 read %s size:%u value:0x%08" PRIx64 >-gt64120_write_intreg(const char *regname, unsigned size, uint64_t value)= "gt64120 write %s size:%u value:0x%08" PRIx64 >-gt64120_isd_remap(uint64_t from_length, uint64_t from_addr, uint64_t to_= length, uint64_t to_addr) "ISD: 0x%08" PRIx64 "@0x%08" PRIx64 " -> 0x%08" P= RIx64 "@0x%08" PRIx64 >diff --git a/hw/pci-host/Kconfig b/hw/pci-host/Kconfig >index 38fd2ee8f3=2E=2Ea07070eddf 100644 >--- a/hw/pci-host/Kconfig >+++ b/hw/pci-host/Kconfig >@@ -81,3 +81,9 @@ config MV64361 > config DINO > bool > select PCI >+ >+config GT64120 >+ bool >+ select PCI >+ select EMPTY_SLOT >+ select I8259 While at it: s/select I8259/depends on I8259/ since the model needs but do= esn't provide I8259? Best regards, Bernhard >diff --git a/hw/mips/gt64xxx_pci=2Ec b/hw/pci-host/gt64120=2Ec >similarity index 100% >rename from hw/mips/gt64xxx_pci=2Ec >rename to hw/pci-host/gt64120=2Ec >diff --git a/hw/pci-host/meson=2Ebuild b/hw/pci-host/meson=2Ebuild >index e832babc9d=2E=2E9a813d552e 100644 >--- a/hw/pci-host/meson=2Ebuild >+++ b/hw/pci-host/meson=2Ebuild >@@ -1,6 +1,7 @@ > pci_ss =3D ss=2Esource_set() > pci_ss=2Eadd(when: 'CONFIG_PAM', if_true: files('pam=2Ec')) > pci_ss=2Eadd(when: 'CONFIG_PCI_BONITO', if_true: files('bonito=2Ec')) >+pci_ss=2Eadd(when: 'CONFIG_GT64120', if_true: files('gt64120=2Ec')) > pci_ss=2Eadd(when: 'CONFIG_PCI_EXPRESS_DESIGNWARE', if_true: files('desi= gnware=2Ec')) > pci_ss=2Eadd(when: 'CONFIG_PCI_EXPRESS_GENERIC_BRIDGE', if_true: files('= gpex=2Ec')) > pci_ss=2Eadd(when: ['CONFIG_PCI_EXPRESS_GENERIC_BRIDGE', 'CONFIG_ACPI'],= if_true: files('gpex-acpi=2Ec')) >diff --git a/hw/pci-host/trace-events b/hw/pci-host/trace-events >index 437e66ff50=2E=2E9d216bb89f 100644 >--- a/hw/pci-host/trace-events >+++ b/hw/pci-host/trace-events >@@ -6,6 +6,13 @@ bonito_spciconf_small_access(uint64_t addr, unsigned siz= e) "PCI config address i > # grackle=2Ec > grackle_set_irq(int irq_num, int level) "set_irq num %d level %d" >=20 >+# gt64120=2Ec >+gt64120_read(uint64_t addr, uint64_t value) "gt64120 read 0x%03"PRIx64" = value:0x%08" PRIx64 >+gt64120_write(uint64_t addr, uint64_t value) "gt64120 write 0x%03"PRIx64= " value:0x%08" PRIx64 >+gt64120_read_intreg(const char *regname, unsigned size, uint64_t value) = "gt64120 read %s size:%u value:0x%08" PRIx64 >+gt64120_write_intreg(const char *regname, unsigned size, uint64_t value)= "gt64120 write %s size:%u value:0x%08" PRIx64 >+gt64120_isd_remap(uint64_t from_length, uint64_t from_addr, uint64_t to_= length, uint64_t to_addr) "ISD: 0x%08" PRIx64 "@0x%08" PRIx64 " -> 0x%08" P= RIx64 "@0x%08" PRIx64 >+ > # mv64361=2Ec > mv64361_region_map(const char *name, uint64_t poffs, uint64_t size, uint= 64_t moffs) "Mapping %s 0x%"PRIx64"+0x%"PRIx64" @ 0x%"PRIx64 > mv64361_region_enable(const char *op, int num) "Should %s region %d" >diff --git a/meson=2Ebuild b/meson=2Ebuild >index 5c6b5a1c75=2E=2Ebd5774f32f 100644 >--- a/meson=2Ebuild >+++ b/meson=2Ebuild >@@ -2944,7 +2944,6 @@ if have_system > 'hw/intc', > 'hw/isa', > 'hw/mem', >- 'hw/mips', > 'hw/misc', > 'hw/misc/macio', > 'hw/net',