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From: Cameron Esfahani via <qemu-devel@nongnu.org>
To: "Philippe Mathieu-Daudé" <philmd@redhat.com>
Cc: qemu-devel@nongnu.org, peter.maydell@linaro.org,
	kraxel@redhat.com, joel@jms.id.au, clg@kaod.org
Subject: Re: [PATCH v1] nrf51: Fix last GPIO CNF address
Date: Tue, 07 Apr 2020 03:09:31 -0700	[thread overview]
Message-ID: <BFA58F3C-CA4F-4ADF-854F-2658134D3888@apple.com> (raw)
In-Reply-To: <6aac0d31-d0a4-d103-e3b5-89feef27c018@redhat.com>

I'm not burying anything.  This patch is stand alone and all the tests do work.  They work with or without Cedric's nee Andrew's patch.  But, if some derivative of that patch is eventually implemented, something needs to be done for this NRF51 gpio qtest to work.

There are two possibilities for the following qtest in microbit-test.c:

>     actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) & 0x01;
>     g_assert_cmpuint(actual, ==, 0x01);


1 - The code is purposefully reading 32-bits from an unaligned address which only partially refers to a documented register.  And the only reason this code works is because that 32-bit value is turned into a 8-bit read.  And if that's the case, then someone should update a comment in the test to indicate that this is being done purposefully.
2 - NRF51_GPIO_REG_CNF_END is incorrectly set to be 0x77F.  Looking at the documentation for this chip, the last defined CNF register starts at 0x77C.

The NRF51 doesn't support unaligned accesses, so I assume that possibility 1 isn't true.

So, is NRF51_GPIO_REG_CNF_END supposed to refer to a valid register, or the end of the implementation space?

If it's the former, then it should be adjusted to 0x77c and possibly update the below code in nrf51_gpio.c (line 156):

>     case NRF51_GPIO_REG_CNF_START ... NRF51_GPIO_REG_CNF_END:


to become

>     case NRF51_GPIO_REG_CNF_START ... NRF51_GPIO_REG_CNF_END + 3:

if unaligned access are expected to work.  But, considering the NRF51 doesn't support unaligned accesses, I don't think this appropriate.

If it's the latter, then the test cases in microbit-test.c should be updated to something like the following:

>     actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END - 3) & 0x01;
>     g_assert_cmpuint(actual, ==, 0x01);


Cameron Esfahani
dirty@apple.com

"Americans are very skilled at creating a custom meaning from something that's mass-produced."

Ann Powers


> On Apr 7, 2020, at 1:44 AM, Philippe Mathieu-Daudé <philmd@redhat.com> wrote:
> 
>> Considering NRF51 doesn't support unaligned accesses, the simplest fix
>> is to actually set NRF51_GPIO_REG_CNF_END to the start of the last valid
>> CNF register: 0x77c.
> 
> NAck. You are burying bugs deeper. This test has to work.
> 
> What would be helpful is qtests with unaligned accesses (expected to work) such your USB XHCI VERSION example.



  reply	other threads:[~2020-04-07 10:10 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-06 22:55 [PATCH v1] nrf51: Fix last GPIO CNF address Cameron Esfahani via
2020-04-07  6:49 ` Cédric Le Goater
2020-04-07  8:40 ` Peter Maydell
2020-04-07  8:45   ` Joel Stanley
2020-04-07  8:50     ` Peter Maydell
2020-04-10  3:42       ` Andrew Jeffery
2020-04-10 12:26         ` Peter Maydell
2020-04-10 13:35           ` Andrew Jeffery
2020-04-07  8:44 ` Philippe Mathieu-Daudé
2020-04-07 10:09   ` Cameron Esfahani via [this message]
2020-04-14  8:56     ` Joel Stanley

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