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Tue, 07 Apr 2020 03:09:32 -0700 (PDT) Content-type: text/plain; charset=utf-8 MIME-version: 1.0 (Mac OS X Mail 12.4 \(3445.104.11\)) Subject: Re: [PATCH v1] nrf51: Fix last GPIO CNF address In-reply-to: <6aac0d31-d0a4-d103-e3b5-89feef27c018@redhat.com> Date: Tue, 07 Apr 2020 03:09:31 -0700 Cc: qemu-devel@nongnu.org, peter.maydell@linaro.org, kraxel@redhat.com, joel@jms.id.au, clg@kaod.org Content-transfer-encoding: quoted-printable Message-id: References: <0b02fe788de99120894f87f6d5c60e15d6a75d85.1586213450.git.dirty@apple.com> <6aac0d31-d0a4-d103-e3b5-89feef27c018@redhat.com> To: =?utf-8?Q?Philippe_Mathieu-Daud=C3=A9?= X-Mailer: Apple Mail (2.3445.104.11) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.676 definitions=2020-04-07_02:2020-04-07, 2020-04-07 signatures=0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 17.171.2.68 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Reply-to: Cameron Esfahani From: Cameron Esfahani via I'm not burying anything. This patch is stand alone and all the tests = do work. They work with or without Cedric's nee Andrew's patch. But, = if some derivative of that patch is eventually implemented, something = needs to be done for this NRF51 gpio qtest to work. There are two possibilities for the following qtest in microbit-test.c: > actual =3D qtest_readl(qts, NRF51_GPIO_BASE + = NRF51_GPIO_REG_CNF_END) & 0x01; > g_assert_cmpuint(actual, =3D=3D, 0x01); 1 - The code is purposefully reading 32-bits from an unaligned address = which only partially refers to a documented register. And the only = reason this code works is because that 32-bit value is turned into a = 8-bit read. And if that's the case, then someone should update a = comment in the test to indicate that this is being done purposefully. 2 - NRF51_GPIO_REG_CNF_END is incorrectly set to be 0x77F. Looking at = the documentation for this chip, the last defined CNF register starts at = 0x77C. The NRF51 doesn't support unaligned accesses, so I assume that = possibility 1 isn't true. So, is NRF51_GPIO_REG_CNF_END supposed to refer to a valid register, or = the end of the implementation space? If it's the former, then it should be adjusted to 0x77c and possibly = update the below code in nrf51_gpio.c (line 156): > case NRF51_GPIO_REG_CNF_START ... NRF51_GPIO_REG_CNF_END: to become > case NRF51_GPIO_REG_CNF_START ... NRF51_GPIO_REG_CNF_END + 3: if unaligned access are expected to work. But, considering the NRF51 = doesn't support unaligned accesses, I don't think this appropriate. If it's the latter, then the test cases in microbit-test.c should be = updated to something like the following: > actual =3D qtest_readl(qts, NRF51_GPIO_BASE + = NRF51_GPIO_REG_CNF_END - 3) & 0x01; > g_assert_cmpuint(actual, =3D=3D, 0x01); Cameron Esfahani dirty@apple.com "Americans are very skilled at creating a custom meaning from something = that's mass-produced." Ann Powers > On Apr 7, 2020, at 1:44 AM, Philippe Mathieu-Daud=C3=A9 = wrote: >=20 >> Considering NRF51 doesn't support unaligned accesses, the simplest = fix >> is to actually set NRF51_GPIO_REG_CNF_END to the start of the last = valid >> CNF register: 0x77c. >=20 > NAck. You are burying bugs deeper. This test has to work. >=20 > What would be helpful is qtests with unaligned accesses (expected to = work) such your USB XHCI VERSION example.