From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NE6Ha-0007qH-5R for qemu-devel@nongnu.org; Fri, 27 Nov 2009 14:15:06 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1NE6HV-0007ow-Ml for qemu-devel@nongnu.org; Fri, 27 Nov 2009 14:15:05 -0500 Received: from [199.232.76.173] (port=33796 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NE6HV-0007ol-KD for qemu-devel@nongnu.org; Fri, 27 Nov 2009 14:15:01 -0500 Received: from mail.gmx.net ([213.165.64.20]:36926) by monty-python.gnu.org with smtp (Exim 4.60) (envelope-from ) id 1NE6HV-0004rR-7b for qemu-devel@nongnu.org; Fri, 27 Nov 2009 14:15:01 -0500 Message-ID: From: "Sebastian Herbszt" References: <11090DAABE9449F7B5D1415C45F8F411@FSCPC> <20091123194307.GC13854@redhat.com> <2D659FA33BF64C419243FD76049AFD33@FSCPC> <20091124062810.GZ2999@redhat.com> <20091124143812.GA27783@shareable.org> <20091124144044.GJ2999@redhat.com> <20091125060951.GA17203@shareable.org> <20091125122039.GM2999@redhat.com> <20091125153116.GA30957@morn.localdomain> <168FD1E43DF64B0DB0942A6EC0BD3A62@FSCPC> <20091127030023.GC6094@shareable.org> In-Reply-To: <20091127030023.GC6094@shareable.org> Subject: Re: [Qemu-devel] Re: POST failure (loop) with isapc and seabios Date: Fri, 27 Nov 2009 20:13:12 +0100 MIME-Version: 1.0 Content-Type: text/plain; format=flowed; charset="iso-8859-1"; reply-type=original Content-Transfer-Encoding: 7bit List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Jamie Lokier Cc: Kevin O'Connor , qemu-devel@nongnu.org, Gleb Natapov Jamie Lokier wrote: > Sebastian Herbszt wrote: >> >We could have qemu do a soft reset (not reload rom) on a triple fault >> >or keyboard controller reset, and then have SeaBIOS request a hard >> >reset (have qemu reload rom) if it detects a soft reset that is not a >> >"resume" request. >> > >> >I'm also not sure what qemu does today. >> >> I don't think such an interface would add a long time benefit and >> would prefer a proper solution which will not tie seabios even more >> to qemu. One day it might be possible to run a commercial BIOS on >> qemu, just like it is possible on Bochs. Adding this interface >> might prevent that. > > What does a real BIOS on real hardware do? > > Do real BIOSes make a decision as described above, and we're just > assuming they don't? A real BIOS gets started, checks CMOS shutdown status byte and decides whether to POST or resume execution somewhere else. > One way to answer may be: On a real PC with i440FX, what kind of reset > are the different reset methods (triple fault, keyboard etc.) normally > configured to do? Should be those power on -> hard reset CPU shutdown bus cycle -> soft reset TRC register (BISTE=0, SHRE=0, RCPU=1) -> soft reset TRC register (BISTE=0, SHRE=1, RCPU=1) -> hard reset keyboard controller -> soft reset I/O port 92h -> soft reset RC register (SRST=0, RCPU=1) -> soft reset RC register (SRST=1, RCPU=1) -> hard reset > IIRC, HIMEM.SYS in DOS must use at least one of the > switch-to-real-mode methods to work, and that driver is needed by > Windows 3/3.11/95/98/ME, but I'm a bit vague on the details. The highmem.sys version i got here seems to use CR0 to switch between real and protected mode. I can't find where/if it loads a hosed IDT. - Sebastian