From: Wei Xu <wexu2@cisco.com>
To: Isaku Yamahata <yamahata@valinux.co.jp>,
qemu-devel@nongnu.org, Wei Xu <wexu2@cisco.com>
Cc: skandasa@cisco.com, adhyas@gmail.com, etmartin@cisco.com, mst@redhat.com
Subject: [Qemu-devel] Re: [PATCH 00/14] pcie port switch emulators
Date: Mon, 06 Sep 2010 10:02:04 -0700 [thread overview]
Message-ID: <C8AA6C9C.10B42%wexu2@cisco.com> (raw)
In-Reply-To: <cover.1283759074.git.yamahata@valinux.co.jp>
Isaku,
Thanks! Last week I did some merging to qemu-kvm and found similar issues
(qdev reset) and also ioapic/apic needs many changes. I may ask your help
this week...
Wei
On 9/6/10 12:46 AM, "Isaku Yamahata" <yamahata@valinux.co.jp> wrote:
> This patch series implements pcie port switch emulators
> which is basic part for pcie/q35 support.
> This is for mst/pci tree.
>
> some random comments
> - pci bus reset
> As Anthony is cleaning up qdev reset stuff, so pci bus reset code
> is commented out. Once the qdev clean up is done, the patch that
> enabled pci bus reset will be sent.
>
> - vid/did
> there are arbitrariness for pcie port switch. I just choose
> Intel and IT one to model them.
>
> thanks,
>
> Isaku Yamahata (14):
> RESEND apb: fix typo.
> pci: consolidate pci_add_capability_at_offset() into
> pci_add_capability().
> pci bridge: add helper function for ssvid capability.
> pci: call hotplug callback even when not hotplug case for later use.
> pci: make pci_parse_devfn() aware of func.
> pci_ids.h: add vendor id of Texus Intesruments.
> msi: implemented msi.
> pcie: helper functions for pcie extended capability.
> pcie port: define struct PCIEPort/PCIESlot and helper functions
> pcie root port: implement pcie root port.
> pcie upstream port: pci express switch upstream port.
> pcie downstream port: pci express switch downstream port.
> pcie/hotplug: glue pushing attention button command. pcie_abp
> pcie/aer: glue aer error injection into qemu monitor.
>
> Makefile.objs | 6 +-
> hw/acpi_piix4.c | 3 +
> hw/apb_pci.c | 6 +-
> hw/eepro100.c | 4 +-
> hw/msi.c | 362 +++++++++++
> hw/msi.h | 41 ++
> hw/msix.c | 3 +-
> hw/pci.c | 70 ++-
> hw/pci.h | 36 +-
> hw/pci_bridge.c | 19 +
> hw/pci_bridge.h | 3 +
> hw/pci_ids.h | 2 +
> hw/pcie.c | 1753
> ++++++++++++++++++++++++++++++++++++++++++++++++++
> hw/pcie.h | 186 ++++++
> hw/pcie_downstream.c | 224 +++++++
> hw/pcie_downstream.h | 33 +
> hw/pcie_port.c | 188 ++++++
> hw/pcie_port.h | 51 ++
> hw/pcie_root.c | 247 +++++++
> hw/pcie_root.h | 32 +
> hw/pcie_upstream.c | 206 ++++++
> hw/pcie_upstream.h | 32 +
> qemu-common.h | 3 +
> qemu-monitor.hx | 36 +
> sysemu.h | 9 +
> 25 files changed, 3520 insertions(+), 35 deletions(-)
> create mode 100644 hw/msi.c
> create mode 100644 hw/msi.h
> create mode 100644 hw/pcie.c
> create mode 100644 hw/pcie.h
> create mode 100644 hw/pcie_downstream.c
> create mode 100644 hw/pcie_downstream.h
> create mode 100644 hw/pcie_port.c
> create mode 100644 hw/pcie_port.h
> create mode 100644 hw/pcie_root.c
> create mode 100644 hw/pcie_root.h
> create mode 100644 hw/pcie_upstream.c
> create mode 100644 hw/pcie_upstream.h
>
next prev parent reply other threads:[~2010-09-06 17:02 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-09-06 7:46 [Qemu-devel] [PATCH 00/14] pcie port switch emulators Isaku Yamahata
2010-09-06 7:46 ` [Qemu-devel] [PATCH 01/14] RESEND apb: fix typo Isaku Yamahata
2010-09-06 9:46 ` [Qemu-devel] " Michael S. Tsirkin
2010-09-06 17:54 ` Blue Swirl
2010-09-06 19:55 ` Michael S. Tsirkin
2010-09-06 22:59 ` Isaku Yamahata
2010-09-06 7:46 ` [Qemu-devel] [PATCH 02/14] pci: consolidate pci_add_capability_at_offset() into pci_add_capability() Isaku Yamahata
2010-09-06 8:10 ` [Qemu-devel] " Michael S. Tsirkin
2010-09-06 7:46 ` [Qemu-devel] [PATCH 03/14] pci bridge: add helper function for ssvid capability Isaku Yamahata
2010-09-06 7:46 ` [Qemu-devel] [PATCH 04/14] pci: call hotplug callback even when not hotplug case for later use Isaku Yamahata
2010-09-06 7:46 ` [Qemu-devel] [PATCH 05/14] pci: make pci_parse_devfn() aware of func Isaku Yamahata
2010-09-06 7:46 ` [Qemu-devel] [PATCH 06/14] pci_ids.h: add vendor id of Texus Intesruments Isaku Yamahata
2010-09-06 7:46 ` [Qemu-devel] [PATCH 07/14] msi: implemented msi Isaku Yamahata
2010-09-06 9:44 ` [Qemu-devel] " Michael S. Tsirkin
2010-09-08 7:43 ` Isaku Yamahata
2010-09-08 7:51 ` Michael S. Tsirkin
2010-09-06 7:46 ` [Qemu-devel] [PATCH 08/14] pcie: helper functions for pcie extended capability Isaku Yamahata
2010-09-06 7:46 ` [Qemu-devel] [PATCH 09/14] pcie port: define struct PCIEPort/PCIESlot and helper functions Isaku Yamahata
2010-09-06 7:46 ` [Qemu-devel] [PATCH 10/14] pcie root port: implement pcie root port Isaku Yamahata
2010-09-06 7:46 ` [Qemu-devel] [PATCH 11/14] pcie upstream port: pci express switch upstream port Isaku Yamahata
2010-09-06 7:46 ` [Qemu-devel] [PATCH 12/14] pcie downstream port: pci express switch downstream port Isaku Yamahata
2010-09-06 7:46 ` [Qemu-devel] [PATCH 13/14] pcie/hotplug: glue pushing attention button command. pcie_abp Isaku Yamahata
2010-09-06 7:46 ` [Qemu-devel] [PATCH 14/14] pcie/aer: glue aer error injection into qemu monitor Isaku Yamahata
2010-09-06 17:02 ` Wei Xu [this message]
2010-09-07 17:14 ` [Qemu-devel] Re: [PATCH 00/14] pcie port switch emulators Michael S. Tsirkin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=C8AA6C9C.10B42%wexu2@cisco.com \
--to=wexu2@cisco.com \
--cc=adhyas@gmail.com \
--cc=etmartin@cisco.com \
--cc=mst@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=skandasa@cisco.com \
--cc=yamahata@valinux.co.jp \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).