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Date: Wed, 22 Jan 2014 15:57:27 -0600
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From: Xin Tong <trent.tong@gmail.com>
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Subject: Re: [Qemu-devel] Intel AVX instructions
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To: Richard Henderson <rth@twiddle.net>
Cc: Paolo Bonzini <pbonzini@redhat.com>, QEMU Developers <qemu-devel@nongnu.org>, Stefan Hajnoczi <stefanha@redhat.com>

Richard:

That is very intelligient way to support AVX. I believe Bochs uses
similar technique.

On Wed, Jan 22, 2014 at 2:19 PM, Richard Henderson <rth@twiddle.net> wrote:
> On 01/22/2014 11:35 AM, Xin Tong wrote:
>> It seems that BOCHS have AVX instructions support in interpreter. I am
>> thinking an easy/reliable way to do this would be generate helper
>> calls to emulate every AVX instruction and follow how BOCHS emulates
>> them. Then depending on the expected frequency and difficulties, one
>> can decide whether to move some of the instructions into TCG JITted
>> code ?
>>
>> Also, it would be desirable to use the MMX/SSE structures and
>> functions that already exist in QEMU target-i386/translate.c
>
> The way you should start is by re-using the existing SSE helpers.
>
> There are several things one must consider with AVX:
>
>   (1) Old SSE insns.  These do not modify bits 128 and higher.
>   (2) SSE insns encoded with VEX.  These zero bits 128 and higher.
>   (3) AVX insns.  These (generally) modify all 256 bits.
>
> Case 1 can be handled by doing nothing with the existing helpers.
>
> Case 2 can be handled by using the existing helper, followed by a couple of
> stores to zero the high part.
>
> Case 3 can, with only a few exceptions, be handled by using the existing helper
> twice on the two halves.  Thankfully the existing helpers work with host
> pointers rather than register numbers.
>
> That will cover at least 90% of the AVX2 instruction set.
>
>
> r~