Re: [RESEND PATCH v2] target/i386: Switch back XFRM value

[Christian Ehrhardt <christian.ehrhardt@canonical.com>]

On Thu, Oct 27, 2022 at 2:36 AM Yang, Weijiang <weijiang.yang@intel.com> wrote:
>
>
> On 10/26/2022 7:57 PM, Zhong, Yang wrote:
> > The previous patch wrongly replaced FEAT_XSAVE_XCR0_{LO|HI} with
> > FEAT_XSAVE_XSS_{LO|HI} in CPUID(EAX=12,ECX=1):{ECX,EDX}, which made
> > SGX enclave only supported SSE and x87 feature(xfrm=0x3).
> >
> > Fixes: 301e90675c3f ("target/i386: Enable support for XSAVES based features")
> >
> > Signed-off-by: Yang Zhong <yang.zhong@linux.intel.com>
> > ---
> >   target/i386/cpu.c | 4 ++--
> >   1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> > index ad623d91e4..19aaed877b 100644
> > --- a/target/i386/cpu.c
> > +++ b/target/i386/cpu.c
> > @@ -5584,8 +5584,8 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
> >           } else {
> >               *eax &= env->features[FEAT_SGX_12_1_EAX];
> >               *ebx &= 0; /* ebx reserve */
> > -            *ecx &= env->features[FEAT_XSAVE_XSS_LO];
> > -            *edx &= env->features[FEAT_XSAVE_XSS_HI];
> > +            *ecx &= env->features[FEAT_XSAVE_XCR0_LO];
> > +            *edx &= env->features[FEAT_XSAVE_XCR0_HI];
>
> Oops, that's my fault to replace with wrong definitions, thanks for the fix!
>
> Reviewed-by:  Yang Weijiang <weijiang.yang@intel.com>

Hi,
I do not have any background on this but stumbled over this and wondered,
is there any particular reason why this wasn't applied yet?

It seemed to fix a former mistake, was acked and then ... silence

> >
> >               /* FP and SSE are always allowed regardless of XSAVE/XCR0. */
> >               *ecx |= XSTATE_FP_MASK | XSTATE_SSE_MASK;
>


-- 
Christian Ehrhardt
Senior Staff Engineer, Ubuntu Server
Canonical Ltd