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Mon, 23 Mar 2026 13:48:10 -0700 (PDT) MIME-Version: 1.0 References: <4895991dcd597b052869e2275d5f0056dfc2368b.1774271525.git.matheus.bernardino@oss.qualcomm.com> In-Reply-To: <4895991dcd597b052869e2275d5f0056dfc2368b.1774271525.git.matheus.bernardino@oss.qualcomm.com> From: Taylor Simpson Date: Mon, 23 Mar 2026 14:47:59 -0600 X-Gm-Features: AaiRm53Echdc8k_hmlizoMjL0Il9e7-KdXXbsSmlxZRmqzMbWstf5TdeXkez-QI Message-ID: Subject: Re: [PATCH 05/13] target/hexagon: add v68 HVX IEEE float min/max insns To: Matheus Tavares Bernardino Cc: qemu-devel@nongnu.org, brian.cain@oss.qualcomm.com, ale@rev.ng, anjo@rev.ng, marco.liebel@oss.qualcomm.com, philmd@linaro.org, quic_mburton@quicinc.com, sid.manning@oss.qualcomm.com Content-Type: multipart/alternative; boundary="0000000000001cddc4064db727a9" Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=ltaylorsimpson@gmail.com; helo=mail-pj1-x102f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, HTML_MESSAGE=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org --0000000000001cddc4064db727a9 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Mon, Mar 23, 2026 at 7:15=E2=80=AFAM Matheus Tavares Bernardino < matheus.bernardino@oss.qualcomm.com> wrote: > Add HVX IEEE floating-point min/max instructions: > - vfmin_hf, vfmin_sf: IEEE floating-point minimum > - vfmax_hf, vfmax_sf: IEEE floating-point maximum > - vmax_hf, vmax_sf: qfloat IEEE maximum > - vmin_hf, vmin_sf: qfloat IEEE minimum > > The Hexagon qfloat variants are similar to the IEEE-754 ones, but they > handle NaN slightly differently. See comment on kvx_ieee.h > > Signed-off-by: Matheus Tavares Bernardino < > matheus.bernardino@oss.qualcomm.com> > --- > target/hexagon/mmvec/kvx_ieee.h | 12 +++++ > target/hexagon/mmvec/kvx_ieee.c | 46 ++++++++++++++++++++ > target/hexagon/imported/mmvec/encode_ext.def | 11 +++++ > target/hexagon/imported/mmvec/ext.idef | 28 +++++++++++- > 4 files changed, 96 insertions(+), 1 deletion(-) > > diff --git a/target/hexagon/mmvec/kvx_ieee.h > b/target/hexagon/mmvec/kvx_ieee.h > index e92ddebeb9..78f546eb8e 100644 > --- a/target/hexagon/mmvec/kvx_ieee.h > +++ b/target/hexagon/mmvec/kvx_ieee.h > @@ -44,4 +44,16 @@ uint32_t fp_vdmpy(uint16_t a1, uint16_t a2, uint16_t > a3, uint16_t a4, > uint32_t fp_vdmpy_acc(uint32_t acc, uint16_t a1, uint16_t a2, uint16_t a= 3, > uint16_t a4, float_status *fp_status); > > +/* IEEE - FP min/max instructions */ > +uint32_t fp_min_sf(uint32_t a1, uint32_t a2, float_status *fp_status); > +uint32_t fp_max_sf(uint32_t a1, uint32_t a2, float_status *fp_status); > +uint16_t fp_min_hf(uint16_t a1, uint16_t a2, float_status *fp_status); > +uint16_t fp_max_hf(uint16_t a1, uint16_t a2, float_status *fp_status); > + > +/* Qfloat min/max treat +NaN as greater than +INF and -NaN as smaller > than -INF */ > +uint32_t qf_max_sf(uint32_t a1, uint32_t a2, float_status *fp_status); > +uint32_t qf_min_sf(uint32_t a1, uint32_t a2, float_status *fp_status); > +uint16_t qf_max_hf(uint16_t a1, uint16_t a2, float_status *fp_status); > +uint16_t qf_min_hf(uint16_t a1, uint16_t a2, float_status *fp_status); > Why are we including Qfloat stuff in a patch series for IEEE float? > + > #endif > diff --git a/target/hexagon/imported/mmvec/encode_ext.def > b/target/hexagon/imported/mmvec/encode_ext.def > index 4ce87d09fd..23fbb75743 100644 > --- a/target/hexagon/imported/mmvec/encode_ext.def > +++ b/target/hexagon/imported/mmvec/encode_ext.def > @@ -823,4 +823,15 @@ > DEF_ENC(V6_vsub_sf_hf,"00011111100vvvvvPP1uuuuu101ddddd") > DEF_ENC(V6_vadd_hf_hf,"00011111101vvvvvPP1uuuuu111ddddd") > DEF_ENC(V6_vsub_hf_hf,"00011111011vvvvvPP1uuuuu000ddddd") > > +/* IEEE FP min/max instructions */ > +DEF_ENC(V6_vfmin_hf,"00011100011vvvvvPP1uuuuu000ddddd") > +DEF_ENC(V6_vfmin_sf,"00011100011vvvvvPP1uuuuu001ddddd") > +DEF_ENC(V6_vfmax_hf,"00011100011vvvvvPP1uuuuu010ddddd") > +DEF_ENC(V6_vfmax_sf,"00011100011vvvvvPP1uuuuu011ddddd") > +DEF_ENC(V6_vmax_sf,"00011111110vvvvvPP1uuuuu001ddddd") > +DEF_ENC(V6_vmin_sf,"00011111110vvvvvPP1uuuuu010ddddd") > +DEF_ENC(V6_vmax_hf,"00011111110vvvvvPP1uuuuu011ddddd") > +DEF_ENC(V6_vmin_hf,"00011111110vvvvvPP1uuuuu100ddddd") > +DEF_ENC(V6_vcvt_ub_hf,"00011111110vvvvvPP1uuuuu101ddddd") > Minor nit - this is a conversion instruction and is repeated in patch 7. Remove it from this patch. Thanks, Taylor --0000000000001cddc4064db727a9 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable


On Mon, Mar 23,= 2026 at 7:15=E2=80=AFAM Matheus Tavares Bernardino <matheus.bernardino@oss.qualcomm.com= > wrote:
Add = HVX IEEE floating-point min/max instructions:
- vfmin_hf, vfmin_sf: IEEE floating-point minimum
- vfmax_hf, vfmax_sf: IEEE floating-point maximum
- vmax_hf, vmax_sf: qfloat IEEE maximum
- vmin_hf, vmin_sf: qfloat IEEE minimum

The Hexagon qfloat variants are similar to the IEEE-754 ones, but they
handle NaN slightly differently. See comment on kvx_ieee.h

Signed-off-by: Matheus Tavares Bernardino <matheus.bernardino@oss.qualcomm= .com>
---
=C2=A0target/hexagon/mmvec/kvx_ieee.h=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 | 12 +++++
=C2=A0target/hexagon/mmvec/kvx_ieee.c=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 | 46 ++++++++++++++++++++
=C2=A0target/hexagon/imported/mmvec/encode_ext.def | 11 +++++
=C2=A0target/hexagon/imported/mmvec/ext.idef=C2=A0 =C2=A0 =C2=A0 =C2=A0| 28= +++++++++++-
=C2=A04 files changed, 96 insertions(+), 1 deletion(-)

diff --git a/target/hexagon/mmvec/kvx_ieee.h b/target/hexagon/mmvec/kvx_iee= e.h
index e92ddebeb9..78f546eb8e 100644
--- a/target/hexagon/mmvec/kvx_ieee.h
+++ b/target/hexagon/mmvec/kvx_ieee.h
@@ -44,4 +44,16 @@ uint32_t fp_vdmpy(uint16_t a1, uint16_t a2, uint16_t a3,= uint16_t a4,
=C2=A0uint32_t fp_vdmpy_acc(uint32_t acc, uint16_t a1, uint16_t a2, uint16_= t a3,
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0uint16_t a4, float_status *fp_status);

+/* IEEE - FP min/max instructions */
+uint32_t fp_min_sf(uint32_t a1, uint32_t a2, float_status *fp_status);
+uint32_t fp_max_sf(uint32_t a1, uint32_t a2, float_status *fp_status);
+uint16_t fp_min_hf(uint16_t a1, uint16_t a2, float_status *fp_status);
+uint16_t fp_max_hf(uint16_t a1, uint16_t a2, float_status *fp_status);
+
+/* Qfloat min/max treat +NaN as greater than +INF and -NaN as smaller than= -INF */
+uint32_t qf_max_sf(uint32_t a1, uint32_t a2, float_status *fp_status);
+uint32_t qf_min_sf(uint32_t a1, uint32_t a2, float_status *fp_status);
+uint16_t qf_max_hf(uint16_t a1, uint16_t a2, float_status *fp_status);
+uint16_t qf_min_hf(uint16_t a1, uint16_t a2, float_status *fp_status);
=

Why are we including Qfloat stuff in a pat= ch series for IEEE float?
=C2=A0
+
=C2=A0#endif
diff --git a/target/hexagon/imported/mmvec/encode_ext.def b= /target/hexagon/imported/mmvec/encode_ext.def
index 4ce87d09fd..23fbb75743 100644
--- a/target/hexagon/imported/mmvec/encode_ext.def
+++ b/target/hexagon/imported/mmvec/encode_ext.def
@@ -823,4 +823,15 @@ DEF_ENC(V6_vsub_sf_hf,"00011111100vvvvvPP1uuuuu10= 1ddddd")
=C2=A0DEF_ENC(V6_vadd_hf_hf,"00011111101vvvvvPP1uuuuu111ddddd") =C2=A0DEF_ENC(V6_vsub_hf_hf,"00011111011vvvvvPP1uuuuu000ddddd")
+/* IEEE FP min/max instructions */
+DEF_ENC(V6_vfmin_hf,"00011100011vvvvvPP1uuuuu000ddddd")
+DEF_ENC(V6_vfmin_sf,"00011100011vvvvvPP1uuuuu001ddddd")
+DEF_ENC(V6_vfmax_hf,"00011100011vvvvvPP1uuuuu010ddddd")
+DEF_ENC(V6_vfmax_sf,"00011100011vvvvvPP1uuuuu011ddddd")
+DEF_ENC(V6_vmax_sf,"00011111110vvvvvPP1uuuuu001ddddd")
+DEF_ENC(V6_vmin_sf,"00011111110vvvvvPP1uuuuu010ddddd")
+DEF_ENC(V6_vmax_hf,"00011111110vvvvvPP1uuuuu011ddddd")
+DEF_ENC(V6_vmin_hf,"00011111110vvvvvPP1uuuuu100ddddd")
+DEF_ENC(V6_vcvt_ub_hf,"00011111110vvvvvPP1uuuuu101ddddd")

Minor nit - this is a conversion instruction = and is repeated in patch 7.=C2=A0 Remove it from this patch.
=C2= =A0
Thanks,
Taylor

--0000000000001cddc4064db727a9--