From: Taylor Simpson <ltaylorsimpson@gmail.com>
To: Matheus Tavares Bernardino <matheus.bernardino@oss.qualcomm.com>
Cc: qemu-devel@nongnu.org, brian.cain@oss.qualcomm.com, ale@rev.ng,
anjo@rev.ng, marco.liebel@oss.qualcomm.com, philmd@linaro.org,
quic_mburton@quicinc.com, sid.manning@oss.qualcomm.com
Subject: Re: [PATCH 07/13] target/hexagon: add v68 HVX IEEE float conversion insns
Date: Mon, 23 Mar 2026 15:25:59 -0600 [thread overview]
Message-ID: <CAATN3Np8aWjb8PyoupVpWCWc8thTLghWn974OVC7M_-opqSrSQ@mail.gmail.com> (raw)
In-Reply-To: <b648b6b7ce4b4c1ab3bc00016d9233a5ede3563b.1774271525.git.matheus.bernardino@oss.qualcomm.com>
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On Mon, Mar 23, 2026 at 7:16 AM Matheus Tavares Bernardino <
matheus.bernardino@oss.qualcomm.com> wrote:
> Add HVX IEEE floating-point conversion instructions:
> - vconv_hf_h, vconv_h_hf, vconv_sf_w, vconv_w_sf: vconv operations
> - vcvt_hf_sf, vcvt_sf_hf: float <-> half float conversions
> - vcvt_hf_b, vcvt_hf_h, vcvt_hf_ub, vcvt_hf_uh: int to half float
> - vcvt_b_hf, vcvt_h_hf, vcvt_ub_hf, vcvt_uh_hf: half float to int
>
> Signed-off-by: Matheus Tavares Bernardino <
> matheus.bernardino@oss.qualcomm.com>
> ---
> target/hexagon/mmvec/kvx_ieee.h | 21 +++++
> target/hexagon/mmvec/kvx_ieee.c | 98 ++++++++++++++++++++
> target/hexagon/imported/mmvec/encode_ext.def | 18 ++++
> target/hexagon/imported/mmvec/ext.idef | 97 +++++++++++++++++++
> 4 files changed, 234 insertions(+)
>
> diff --git a/target/hexagon/mmvec/kvx_ieee.c
> b/target/hexagon/mmvec/kvx_ieee.c
> index 33621a15f3..bbeec09707 100644
> --- a/target/hexagon/mmvec/kvx_ieee.c
> +++ b/target/hexagon/mmvec/kvx_ieee.c
> @@ -131,3 +131,101 @@ uint16_t qf_min_hf(uint16_t a1, uint16_t a2,
> float_status *fp_status)
> if (float16_is_pos_nan(f2) || float16_is_neg_nan(f1)) return a1;
> return fp_min_hf(a1, a2, fp_status);
> }
> +
> +uint16_t f32_to_f16(uint32_t a, float_status *fp_status)
> +{
> + return float16_val(float32_to_float16(make_float32(a), true,
> fp_status));
> +}
> +
> +uint32_t f16_to_f32(uint16_t a, float_status *fp_status)
> +{
> + return float32_val(float16_to_float32(make_float16(a), true,
> fp_status));
> +}
> +
> +uint16_t f16_to_uh(uint16_t op1, float_status *fp_status)
> +{
> + return float16_to_uint16_scalbn(make_float16(op1),
> + float_round_nearest_even,
>
Does HVX always use this rounding mode? The scalar core uses the rounding
mode in USR.
There are several more instances below.
> + 0, fp_status);
> +}
> +
> +int16_t f16_to_h(uint16_t op1, float_status *fp_status)
> +{
> + return float16_to_int16_scalbn(make_float16(op1),
> + float_round_nearest_even,
+ 0, fp_status);
> +}
> +
> +uint8_t f16_to_ub(uint16_t op1, float_status *fp_status)
> +{
> + return float16_to_uint8_scalbn(make_float16(op1),
> + float_round_nearest_even,
+ 0, fp_status);
> +}
> +
> +int8_t f16_to_b(uint16_t op1, float_status *fp_status)
> +{
> + return float16_to_int8_scalbn(make_float16(op1),
> + float_round_nearest_even,
+ 0, fp_status);
> +}
> +
> +uint16_t uh_to_f16(uint16_t op1)
> +{
> + return uint64_to_float16_scalbn(op1, float_round_nearest_even, 0);
> +}
> +
> +uint16_t h_to_f16(int16_t op1)
> +{
> + return int64_to_float16_scalbn(op1, float_round_nearest_even, 0);
> +}
> +
> +uint16_t ub_to_f16(uint8_t op1)
> +{
> + return uint64_to_float16_scalbn(op1, float_round_nearest_even, 0);
> +}
> +
> +uint16_t b_to_f16(int8_t op1)
> +{
> + return int64_to_float16_scalbn(op1, float_round_nearest_even, 0);
> +}
> +
> +int32_t conv_sf_w(int32_t a, float_status *fp_status)
> +{
> + return float32_val(int32_to_float32(a, fp_status));
> +}
> +
> +int16_t conv_hf_h(int16_t a, float_status *fp_status)
> +{
> + return float16_val(int16_to_float16(a, fp_status));
> +}
> +
> +int32_t conv_w_sf(uint32_t a, float_status *fp_status)
> +{
> + float_status scratch_fpst = {};
> + const float32 W_MAX = int32_to_float32(INT32_MAX, &scratch_fpst);
> + const float32 W_MIN = int32_to_float32(INT32_MIN, &scratch_fpst);
> + float32 f1 = make_float32(a);
> +
> + if (float32_is_any_nan(f1) || float32_is_infinity(f1) ||
> + float32_le_quiet(W_MAX, f1, fp_status) ||
> + float32_le_quiet(f1, W_MIN, fp_status)) {
> + return float32_is_neg(f1) ? INT32_MIN : INT32_MAX;
> + }
>
Does float32_to_int32 handle these checks?
> + return float32_to_int32_round_to_zero(f1, fp_status);
>
Rounding mode?
> +}
> +
> +int16_t conv_h_hf(uint16_t a, float_status *fp_status)
> +{/
> + float_status scratch_fpst = {};
> + const float16 H_MAX = int16_to_float16(INT16_MAX, &scratch_fpst);
> + const float16 H_MIN = int16_to_float16(INT16_MIN, &scratch_fpst);
> + float16 f1 = make_float16(a);
> +
> + if (float16_is_any_nan(f1) || float16_is_infinity(f1) ||
> + float16_le_quiet(H_MAX, f1, fp_status) ||
> + float16_le_quiet(f1, H_MIN, fp_status)) {
> + return float16_is_neg(f1) ? INT16_MIN : INT16_MAX;
> + }
> + return float16_to_int16_round_to_zero(f1, fp_status);
> +}
>
Ditto
Thanks,
Taylor
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next prev parent reply other threads:[~2026-03-23 21:27 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-23 13:15 [PATCH 00/13] hexagon: add missing HVX float instructions Matheus Tavares Bernardino
2026-03-23 13:15 ` [PATCH 01/13] tests/docker: Update hexagon cross toolchain to 22.1.0 Matheus Tavares Bernardino
2026-03-23 13:15 ` [PATCH 02/13] target/hexagon: fix incorrect/too-permissive HVX encodings Matheus Tavares Bernardino
2026-03-23 19:21 ` Taylor Simpson
2026-03-23 13:15 ` [PATCH 03/13] target/hexagon/cpu: add HVX IEEE FP extension Matheus Tavares Bernardino
2026-03-23 19:32 ` Taylor Simpson
2026-03-24 16:52 ` Matheus Bernardino
2026-03-24 18:48 ` Taylor Simpson
2026-03-24 19:20 ` Brian Cain
2026-03-24 19:46 ` Taylor Simpson
2026-03-23 13:15 ` [PATCH 04/13] target/hexagon: add v68 HVX IEEE float arithmetic insns Matheus Tavares Bernardino
2026-03-23 20:28 ` Taylor Simpson
2026-03-24 19:30 ` Matheus Bernardino
2026-03-24 19:51 ` Taylor Simpson
2026-03-24 19:59 ` Matheus Bernardino
2026-03-25 1:18 ` Taylor Simpson
2026-03-23 13:15 ` [PATCH 05/13] target/hexagon: add v68 HVX IEEE float min/max insns Matheus Tavares Bernardino
2026-03-23 20:47 ` Taylor Simpson
2026-03-24 20:15 ` Matheus Bernardino
2026-03-23 13:15 ` [PATCH 06/13] target/hexagon: add v68 HVX IEEE float misc insns Matheus Tavares Bernardino
2026-03-23 21:08 ` Taylor Simpson
2026-03-24 20:25 ` Matheus Bernardino
2026-03-23 13:15 ` [PATCH 07/13] target/hexagon: add v68 HVX IEEE float conversion insns Matheus Tavares Bernardino
2026-03-23 21:25 ` Taylor Simpson [this message]
2026-03-24 21:04 ` Matheus Bernardino
2026-03-25 1:15 ` Taylor Simpson
2026-03-23 13:15 ` [PATCH 08/13] target/hexagon: add v68 HVX IEEE float compare insns Matheus Tavares Bernardino
2026-03-23 21:42 ` Taylor Simpson
2026-03-26 13:00 ` Matheus Bernardino
2026-03-23 13:15 ` [PATCH 09/13] target/hexagon: add v73 HVX IEEE bfloat16 insns Matheus Tavares Bernardino
2026-03-23 22:03 ` Taylor Simpson
2026-03-23 13:15 ` [PATCH 10/13] tests/hexagon: add tests for v68 HVX IEEE float arithmetics Matheus Tavares Bernardino
2026-03-24 19:05 ` Taylor Simpson
2026-03-23 13:15 ` [PATCH 11/13] tests/hexagon: add tests for v68 HVX IEEE float min/max Matheus Tavares Bernardino
2026-03-24 19:07 ` Taylor Simpson
2026-03-23 13:15 ` [PATCH 12/13] tests/hexagon: add tests for v68 HVX IEEE float conversions Matheus Tavares Bernardino
2026-03-24 19:30 ` Taylor Simpson
2026-03-23 13:15 ` [PATCH 13/13] tests/hexagon: add tests for v68 HVX IEEE float comparisons Matheus Tavares Bernardino
2026-03-24 19:37 ` Taylor Simpson
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