Re: [Qemu-devel] [PATCH v2 3/4] hw/pci-host/xilinx: QOM'ify the AXI-PCIe host bridge

["Philippe Mathieu-Daudé" <f4bug@amsat.org>]

On Thu, Dec 21, 2017 at 11:20 AM, Michael S. Tsirkin <mst@redhat.com> wrote:
> On Mon, Dec 18, 2017 at 12:12:43PM -0300, Philippe Mathieu-Daudé wrote:
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
>> v2: use 'pci_dev' variable, replaced hw_error() -> error_setg()
>>
>>  hw/pci-host/xilinx-pcie.c | 20 +++++++++-----------
>>  1 file changed, 9 insertions(+), 11 deletions(-)
>>
>> diff --git a/hw/pci-host/xilinx-pcie.c b/hw/pci-host/xilinx-pcie.c
>> index 7659253090..681fdf486a 100644
>> --- a/hw/pci-host/xilinx-pcie.c
>> +++ b/hw/pci-host/xilinx-pcie.c
>> @@ -267,24 +267,22 @@ static void xilinx_pcie_root_config_write(PCIDevice *d, uint32_t address,
>>      }
>>  }
>>
>> -static int xilinx_pcie_root_init(PCIDevice *dev)
>> +static void xilinx_pcie_root_realize(PCIDevice *pci_dev, Error **errp)
>>  {
>> -    BusState *bus = qdev_get_parent_bus(DEVICE(dev));
>> +    BusState *bus = qdev_get_parent_bus(DEVICE(pci_dev));
>>      XilinxPCIEHost *s = XILINX_PCIE_HOST(bus->parent);
>>
>> -    pci_set_word(dev->config + PCI_COMMAND,
>> +    pci_set_word(pci_dev->config + PCI_COMMAND,
>>                   PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
>> -    pci_set_word(dev->config + PCI_MEMORY_BASE, s->mmio_base >> 16);
>> -    pci_set_word(dev->config + PCI_MEMORY_LIMIT,
>> +    pci_set_word(pci_dev->config + PCI_MEMORY_BASE, s->mmio_base >> 16);
>> +    pci_set_word(pci_dev->config + PCI_MEMORY_LIMIT,
>>                   ((s->mmio_base + s->mmio_size - 1) >> 16) & 0xfff0);
>>
>> -    pci_bridge_initfn(dev, TYPE_PCI_BUS);
>> +    pci_bridge_initfn(pci_dev, TYPE_PCI_BUS);
>>
>> -    if (pcie_endpoint_cap_v1_init(dev, 0x80) < 0) {
>> -        hw_error("Failed to initialize PCIe capability");
>> +    if (pcie_endpoint_cap_v1_init(pci_dev, 0x80) < 0) {
>> +        error_setg(errp, "Failed to initialize PCIe capability");
>>      }
>
> This file doesn't include qapi/error.h so this makes build fail on
> mingw. Fixed it up, pls take care in the future.

Oops :| Thanks for fixing it.
I will.

>> -
>> -    return 0;
>>  }
>>
>>  static void xilinx_pcie_root_class_init(ObjectClass *klass, void *data)
>> @@ -300,7 +298,7 @@ static void xilinx_pcie_root_class_init(ObjectClass *klass, void *data)
>>      k->class_id = PCI_CLASS_BRIDGE_HOST;
>>      k->is_express = true;
>>      k->is_bridge = true;
>> -    k->init = xilinx_pcie_root_init;
>> +    k->realize = xilinx_pcie_root_realize;
>>      k->exit = pci_bridge_exitfn;
>>      dc->reset = pci_bridge_reset;
>>      k->config_read = xilinx_pcie_root_config_read;
>> --
>> 2.15.1