From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:44740) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RgAqG-0005Z5-JL for qemu-devel@nongnu.org; Thu, 29 Dec 2011 02:56:01 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RgAqF-0000VU-7N for qemu-devel@nongnu.org; Thu, 29 Dec 2011 02:56:00 -0500 Received: from mail-ww0-f53.google.com ([74.125.82.53]:55628) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RgAqE-0000VO-WE for qemu-devel@nongnu.org; Thu, 29 Dec 2011 02:55:59 -0500 Received: by wgbds1 with SMTP id ds1so21004143wgb.10 for ; Wed, 28 Dec 2011 23:55:57 -0800 (PST) MIME-Version: 1.0 Date: Thu, 29 Dec 2011 12:55:57 +0500 Message-ID: From: Khansa Butt Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH 2/3] target-mips:enabling of 64 bit user mode and floating point operations MIPS_HFLAG_UX is included in env->hflags so that the address computation for LD instruction does not treated as 32 bit code see gen_op_addr_add() in t List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?ISO-8859-1?Q?Andreas_F=E4rber?= Cc: qemu-devel@nongnu.org, Richard Henderson On Fri, Dec 9, 2011 at 5:04 AM, Andreas F=E4rber w= rote: > Thanks for extending the commit description. Please see this for a > template though: > > http://live.gnome.org/Git/CommitMessages > > Looks like there's an empty line missing between subject and description > (and the space after "target-mips:"). > > Am 08.12.2011 06:25, schrieb khansa@kics.edu.pk: >> From: Khansa Butt >> >> >> Signed-off-by: Abdul Qadeer >> --- >> =A0target-mips/translate.c | =A0 =A04 ++++ >> =A01 files changed, 4 insertions(+), 0 deletions(-) >> >> diff --git a/target-mips/translate.c b/target-mips/translate.c >> index d5b1c76..452a63b 100644 >> --- a/target-mips/translate.c >> +++ b/target-mips/translate.c >> @@ -12779,6 +12779,10 @@ void cpu_reset (CPUMIPSState *env) >> =A0 =A0 =A0 =A0 =A0env->hflags |=3D MIPS_HFLAG_FPU; >> =A0 =A0 =A0} >> =A0#ifdef TARGET_MIPS64 >> + =A0 =A0env->hflags |=3D =A0MIPS_HFLAG_UX; > > So for those of us not knowing mips, it's defined as: > > #define MIPS_HFLAG_UX =A0 =A0 0x00200 /* 64-bit user mode =A0 =A0 =A0 =A0= =A0 =A0 =A0 =A0 */ > > The code above is inside CONFIG_USER_ONLY, so this looks right for n64 > but not for n32 ABI. > > If you put this into its own patch with a description of > > ---8<--- > target-mips: Enable 64 bit user mode for n64 > > For user mode n64 ABI emulation, MIPS_HFLAG_UX is included in > env->hflags so that the address computation for LD instruction does not > get treated as 32 bit code, see gen_op_addr_add() in translate.c. > > Signed-off-by: Abdul Qadeer > Signed-off-by: (you) > ---8<--- > > and make it depend on TARGET_ABI_MIPSN64 then I will happily add my > Acked-by. > > >> + =A0 =A0/* if cpu has FPU, MIPS_HFLAG_F64 must be included in env->hfla= gs >> + =A0 =A0 =A0 so that floating point operations can be emulated */ >> + =A0 =A0env->active_fpu.fcr0 =3D env->cpu_model->CP1_fcr0; >> =A0 =A0 =A0if (env->active_fpu.fcr0 & (1 << FCR0_F64)) { >> =A0 =A0 =A0 =A0 =A0env->hflags |=3D MIPS_HFLAG_F64; >> =A0 =A0 =A0} > > Nack. env->active_fpu.fcr0 gets initialized in translate_init.c based on > cpu_model->CR1_fcr0, where FCR0_F64 is set only for 24Kf, 34Kf, > MIPS64R2-generic. TARGET_ABI_MIPSN64 linux-user defaults to 20Kc. So it > seems to rather be an issue of using the right -cpu parameter or > changing the default for n64. [cc'ing Nathan, who introduced the if] The reason why I add this line " env->active_fpu.fcr0 =3D env->cpu_model->CP1_fcr0" is as follows in translate_init.c fpu_init() initializes active_fpu for given cpu model afterwards cpu_reset() reset the values to zero using this memset(env, 0, offsetof(CPUMIPSState, breakpoints)); so whatever the value of cpu_model->CR1_fcr0 was , the value of env->active_fpu.fcr0 will be zero now thats why I add above line to retrieve the correct env->active_fpu.fcr0 value according to CPU model( whether it is 24Kf or 20Kc or something else) During the development of mips64-linux-user I observed this issue. I gave qemu-mips64 command with -cpu option equal to MIPS64R2-generic and an illegal instruction error occurred, so I used above hunk. > > Andreas