From: Khansa Butt <khansa@kics.edu.pk>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH 2/3] target-mips:enabling of 64 bit user mode and floating point operations MIPS_HFLAG_UX is included in env->hflags so that the address computation for LD instruction does not treated as 32 bit code see gen_op_addr_add() in t
Date: Fri, 30 Dec 2011 12:52:56 +0500 [thread overview]
Message-ID: <CAAoJSP7H63RLSj5F-aj9_oUtCPc_q7g5iLTgUW_danU-4M4icw@mail.gmail.com> (raw)
In-Reply-To: <CAAoJSP5wPz_rL9x0ZZBZJz1A9RuGhohLKSg_nChyo96mvuJ70w@mail.gmail.com>
On Thu, Dec 29, 2011 at 4:17 PM, Andreas Färber <andreas.faerber@web.de> wrote:
> Am 29.12.2011 08:55, schrieb Khansa Butt:
>> On Fri, Dec 9, 2011 at 5:04 AM, Andreas Färber <andreas.faerber@web.de> wrote:
>>>> + /* if cpu has FPU, MIPS_HFLAG_F64 must be included in env->hflags
>>>> + so that floating point operations can be emulated */
>>>> + env->active_fpu.fcr0 = env->cpu_model->CP1_fcr0;
>>>> if (env->active_fpu.fcr0 & (1 << FCR0_F64)) {
>>>> env->hflags |= MIPS_HFLAG_F64;
>>>> }
>>>
>>> Nack. env->active_fpu.fcr0 gets initialized in translate_init.c based on
>>> cpu_model->CR1_fcr0, where FCR0_F64 is set only for 24Kf, 34Kf,
>>> MIPS64R2-generic. TARGET_ABI_MIPSN64 linux-user defaults to 20Kc. So it
>>> seems to rather be an issue of using the right -cpu parameter or
>>> changing the default for n64. [cc'ing Nathan, who introduced the if]
>>
>> The reason why I add this line " env->active_fpu.fcr0 =
>> env->cpu_model->CP1_fcr0" is as follows
>> in translate_init.c fpu_init() initializes active_fpu for given cpu
>> model afterwards cpu_reset() reset the values
>> to zero using this
>> memset(env, 0, offsetof(CPUMIPSState, breakpoints));
>> so whatever the value of cpu_model->CR1_fcr0 was , the value of
>> env->active_fpu.fcr0 will be zero now thats why I add above
>> line to retrieve the correct env->active_fpu.fcr0 value according to
>> CPU model( whether it is 24Kf or 20Kc or something else)
>> During the development of mips64-linux-user I observed this issue. I
>> gave qemu-mips64 command with -cpu option equal to MIPS64R2-generic
>> and an illegal instruction error occurred, so I used above hunk.
>
> Well, that sounds like a different and more generic problem that
> shouldn't be fixed inside CONFIG_USER_ONLY && TARGET_MIPS64.
> And your reasoning should've definitely been in the commit message!
>
> The problem here is not whether the patches observably work for you but
> whether it's the correct way to fix it. "We did this because it works
> for us" is never a convincing justification of a change.
> If it doesn't work for you in linux-user it won't work in softmmu
> either, so doing that before #if defined(CONFIG_USER_ONLY) where lots of
> env->cpu_model stuff is being copyied (esp. before env->HABITS to honor
> mips_def_t order) seems better.
>
> Also, given your observation, does it even make sense for
> cpu_mips_init() to call fpu_init() when all CPUState members it
> initializes get cleared in cpu_reset()? Maybe just move that call into
> cpu_reset() and rename it to fpu_reset()? mmu_init() and mvp_init() seem
> okay by contrast.
why cpu_reset() calls memset? it does not reset all the members of CPUState only
those which are in the range of offsetof(CPUMIPSState, breakpoints).
what if I remove
memset line?
>
> When you've figured this out, please again put it into a separate patch
> titled, e.g., "target-mips: Fix FPU reset" with appropriate explanation.
>
> Andreas
next prev parent reply other threads:[~2011-12-30 7:53 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-12-29 7:55 [Qemu-devel] [PATCH 2/3] target-mips:enabling of 64 bit user mode and floating point operations MIPS_HFLAG_UX is included in env->hflags so that the address computation for LD instruction does not treated as 32 bit code see gen_op_addr_add() in t Khansa Butt
2011-12-29 11:17 ` Andreas Färber
[not found] ` <CAAoJSP5wPz_rL9x0ZZBZJz1A9RuGhohLKSg_nChyo96mvuJ70w@mail.gmail.com>
2011-12-30 7:52 ` Khansa Butt [this message]
2011-12-30 12:39 ` Andreas Färber
-- strict thread matches above, loose matches on Subject: below --
2011-12-29 8:06 Khansa Butt
[not found] <CAAoJSP677G-bsiZ3W=D_O5DiwyKv=XtEWgU_6wH2LztGBK2s8A@mail.gmail.com>
2011-12-31 11:54 ` Andreas Färber
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=CAAoJSP7H63RLSj5F-aj9_oUtCPc_q7g5iLTgUW_danU-4M4icw@mail.gmail.com \
--to=khansa@kics.edu.pk \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).