From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:37770) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TwYya-0000pI-5i for qemu-devel@nongnu.org; Sat, 19 Jan 2013 09:00:53 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TwYyY-0006gF-HC for qemu-devel@nongnu.org; Sat, 19 Jan 2013 09:00:51 -0500 Received: from mail-da0-f48.google.com ([209.85.210.48]:37213) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TwYyY-0006gB-Ac for qemu-devel@nongnu.org; Sat, 19 Jan 2013 09:00:50 -0500 Received: by mail-da0-f48.google.com with SMTP id k18so2060113dae.7 for ; Sat, 19 Jan 2013 06:00:49 -0800 (PST) MIME-Version: 1.0 In-Reply-To: <1358453056-2668-1-git-send-email-peter.maydell@linaro.org> References: <1358453056-2668-1-git-send-email-peter.maydell@linaro.org> From: Blue Swirl Date: Sat, 19 Jan 2013 14:00:29 +0000 Message-ID: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH for-1.4] tcg/target-arm: Add missing parens to assertions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Anthony Liguori , qemu-devel@nongnu.org, Aurelien Jarno , patches@linaro.org Thanks, applied. On Thu, Jan 17, 2013 at 8:04 PM, Peter Maydell w= rote: > Silence a (legitimate) complaint about missing parentheses: > > tcg/arm/tcg-target.c: In function =E2=80=98tcg_out_qemu_ld=E2=80=99: > tcg/arm/tcg-target.c:1148:5: error: suggest parentheses around > comparison in operand of =E2=80=98&=E2=80=99 [-Werror=3Dparentheses] > tcg/arm/tcg-target.c: In function =E2=80=98tcg_out_qemu_st=E2=80=99: > tcg/arm/tcg-target.c:1357:5: error: suggest parentheses around > comparison in operand of =E2=80=98&=E2=80=99 [-Werror=3Dparentheses] > > which meant that we would mistakenly always assert if running > a QEMU built with debug enabled on ARM. > > Signed-off-by: Peter Maydell > --- > Errors inadvertently introduced in commit d17bd1. > > tcg/arm/tcg-target.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c > index c3ac85e..d9c33d8 100644 > --- a/tcg/arm/tcg-target.c > +++ b/tcg/arm/tcg-target.c > @@ -1145,7 +1145,7 @@ static inline void tcg_out_qemu_ld(TCGContext *s, c= onst TCGArg *args, int opc) > TCG_REG_R0, SHIFT_IMM_LSL(CPU_TLB_ENTRY_BITS)); > /* We assume that the offset is contained within 20 bits. */ > tlb_offset =3D offsetof(CPUArchState, tlb_table[mem_index][0].addr_r= ead); > - assert(tlb_offset & ~0xfffff =3D=3D 0); > + assert((tlb_offset & ~0xfffff) =3D=3D 0); > if (tlb_offset > 0xfff) { > tcg_out_dat_imm(s, COND_AL, ARITH_ADD, TCG_REG_R0, TCG_REG_R0, > 0xa00 | (tlb_offset >> 12)); > @@ -1354,7 +1354,7 @@ static inline void tcg_out_qemu_st(TCGContext *s, c= onst TCGArg *args, int opc) > TCG_AREG0, TCG_REG_R0, SHIFT_IMM_LSL(CPU_TLB_ENTRY_B= ITS)); > /* We assume that the offset is contained within 20 bits. */ > tlb_offset =3D offsetof(CPUArchState, tlb_table[mem_index][0].addr_w= rite); > - assert(tlb_offset & ~0xfffff =3D=3D 0); > + assert((tlb_offset & ~0xfffff) =3D=3D 0); > if (tlb_offset > 0xfff) { > tcg_out_dat_imm(s, COND_AL, ARITH_ADD, TCG_REG_R0, TCG_REG_R0, > 0xa00 | (tlb_offset >> 12)); > -- > 1.7.9.5 > >