From: Blue Swirl <blauwirbel@gmail.com>
To: Prathmesh Kallurkar <prathmesh.kallurkar@gmail.com>
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] Qemu memory operations
Date: Tue, 14 Aug 2012 18:44:17 +0000 [thread overview]
Message-ID: <CAAu8pHugs150bb9S__N-FAg_3_eG4eJ4KAnhSFdFjZyCMFVCuQ@mail.gmail.com> (raw)
In-Reply-To: <CAF_r1AaSGJE_Lf88TYkt+dpDnQPLmrzLFpBR4ChSd35ZKHqPsg@mail.gmail.com>
On Tue, Aug 14, 2012 at 11:58 AM, Prathmesh Kallurkar
<prathmesh.kallurkar@gmail.com> wrote:
> Sorry friends for the misleading instructions in the previous mail.
>
> cmp ecx, [r12+0x4]
> mov r10b, [r13+0x0]
> mov byte [rax+0xf0000], 0x0
> mov byte [rax+rdx], 0x0
>
> It seems all the above instructions are getting covered with the
> tcg_gen_ld/st helpers.
>
> But now I have stumbled upon another problem :
> I initially thought that all the interactions with the guest memory happen
> through the helper instructions in the translate.c file.
> However, I found that the helper functions for some instructions like
> cmpxcgh8b and cmpxchg16b are actually accessing guest memory.
>
> So, does it mean there are more than one entry points for reading guest
> memory.
> Can some one please explain how are the ldq and stq instructions translated
> to access the guest memory ??
I suppose target-i386/translate.c:5245 handles mov mem, reg case even
for 64 bit. But QEMU is not a very nice platform for memory access
instrumentation because of internal TLBs and code generation.
There have been some discussions about tracking guest memory accesses
before, please check the list archives.
>
> Thanks in advance.
>
>
> Regards,
> Prathmesh Kallurkar
next prev parent reply other threads:[~2012-08-14 18:44 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-08-12 16:31 [Qemu-devel] Qemu memory operations Prathmesh Kallurkar
2012-08-14 11:58 ` Prathmesh Kallurkar
2012-08-14 18:44 ` Blue Swirl [this message]
2012-08-14 21:17 ` Steven
2012-08-15 8:57 ` Prathmesh Kallurkar
2012-08-15 17:21 ` Steven
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