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Mon, 06 Jan 2025 09:54:42 -0800 (PST) X-Google-Smtp-Source: AGHT+IGhUeBRKm87lpA4OkU+PW6OVxzk/PdQTTo8DJ9H7DxKOIWLi5mINjgNIwXQXlvQE+Mv7YJYGNpHFRjIkXlQdVs= X-Received: by 2002:a05:620a:27cb:b0:7b8:61df:f5de with SMTP id af79cd13be357-7b9ba7e5f73mr8860432485a.45.1736186082226; Mon, 06 Jan 2025 09:54:42 -0800 (PST) Received: from 744723338238 named unknown by gmailapi.google.com with HTTPREST; Mon, 6 Jan 2025 12:54:41 -0500 From: Andrea Bolognani References: <20241203094702.124748-1-abologna@redhat.com> MIME-Version: 1.0 In-Reply-To: Date: Mon, 6 Jan 2025 12:54:41 -0500 Message-ID: Subject: Re: [PATCH] binfmt: Don't consider riscv{32, 64} part of the same family To: =?UTF-8?Q?Daniel_P=2E_Berrang=C3=A9?= Cc: Peter Maydell , Alistair Francis , qemu-devel@nongnu.org, Laurent Vivier , David Abdurachmanov Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=170.10.129.124; envelope-from=abologna@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.446, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Mon, Jan 06, 2025 at 11:57:58AM +0000, Daniel P. Berrang=C3=A9 wrote: > On Mon, Jan 06, 2025 at 11:47:00AM +0000, Peter Maydell wrote: > > On Mon, 6 Jan 2025 at 01:29, Alistair Francis wr= ote: > > > We didn't get an answer to the issue of a CPU supporting RV32 and yet > > > the kernel still calls QEMU. > > > > > > I understand this allows things to work out of the box, but seems lik= e > > > a disservice to any hardware that does support RV32 > > > > There's the same thing on Arm too -- we don't set up qemu-user > > aarch32 binfmt-misc on an aarch64 system because the host might > > be able to natively execute the aarch32 binary. This is becoming > > less true, but we still don't want to silently downgrade > > native execution to emulation on the hosts where native execution > > used to work. > > Arm is a bigger problem as historically there genuinely was a > non-trivial set of CPUs with 32-on-64 support in HW. > > IIUC, the riscv situation is much less likely to be a real problem Exactly. My understanding is that, while 64-bit RISC-V CPUs that can natively run 32-bit applications are theoretically possible, no such CPU actually exists right now. Even if it did exist, distros would have to set up things to support this scenario, which they don't. So in the current situation we're effectively making it impossible to run riscv32 binaries on riscv64 for the benefit of a hypotetical scenario. > As a immediate bandaid, I'd suggest that qemu-binfmt-conf.sh could keep > its current logic as the default, and have a switch "--32-on-64" [1] to > tell it to generate the binfmt for 32-bit arch, even if 64-bit arch > could have 32-bit support. > > Distros/users could then choose whether to pass --32-on-64 when staticall= y > generating the binfmt files. While I'm still convinced that this patch could be safely applied as-is, I'd be happy to go with your proposed approach if doing so would help move things forward. --=20 Andrea Bolognani / Red Hat / Virtualization