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From: "Marcin Krzemiński" <mar.krzeminski@gmail.com>
To: "Cédric Le Goater" <clg@kaod.org>
Cc: Peter Maydell <peter.maydell@linaro.org>,
	Peter Crosthwaite <crosthwaite.peter@gmail.com>,
	kwolf@redhat.com, Andrew Jeffery <andrew@aj.id.au>,
	qemu-arm@nongnu.org,
	"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
	armbru@redhat.com
Subject: Re: [Qemu-devel] [PATCH v5 6/9] ast2400: add SMC controllers (FMC and SPI)
Date: Mon, 4 Jul 2016 09:12:09 +0200	[thread overview]
Message-ID: <CABc_YGA39dc6Cz=eayo9CHzOooNDPdU6bfmCc=+Nqz8jSW9ofw@mail.gmail.com> (raw)
In-Reply-To: <f82c7ccd-b706-c2df-8593-3d64adf65192@kaod.org>

2016-07-04 8:58 GMT+02:00 Cédric Le Goater <clg@kaod.org>:

> Hello Marcin,
>
> On 07/02/2016 07:00 PM, mar.krzeminski wrote:
> >>
> >> +
> >> +/* CE Control Register */
> >> +#define R_CE_CTRL            (0x04 / 4)
> >> +#define   CTRL_EXTENDED4       4  /* 32 bit addressing for SPI */
> >> +#define   CTRL_EXTENDED3       3  /* 32 bit addressing for SPI */
> >> +#define   CTRL_EXTENDED2       2  /* 32 bit addressing for SPI */
> >> +#define   CTRL_EXTENDED1       1  /* 32 bit addressing for SPI */
> >> +#define   CTRL_EXTENDED0       0  /* 32 bit addressing for SPI */
> > Hi
> >
> > Above comments does not say anything.
> >
>
> I suppose you mean that the names are confusing ?
>
> The default setting for CE0 and CE1 is done with the hardware strapping
> SCU70 register.
>
> Yes, is hard to say what does it mean and what it does (at least for me).
This is a minor.

Thanks,
Marcin

Thanks,
>
> C.
>
>

  reply	other threads:[~2016-07-04  7:12 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-28 18:24 [Qemu-devel] [PATCH v5 0/9] ast2400: SMC controllers Cédric Le Goater
2016-06-28 18:24 ` [Qemu-devel] [PATCH v5 1/9] ssi: change ssi_slave_init to be a realize ops Cédric Le Goater
2016-07-01 15:16   ` Peter Maydell
2016-06-28 18:24 ` [Qemu-devel] [PATCH v5 2/9] m25p80: do not put iovec on the stack Cédric Le Goater
2016-06-28 18:24 ` [Qemu-devel] [PATCH v5 3/9] m25p80: avoid out of bounds accesses Cédric Le Goater
2016-06-28 18:24 ` [Qemu-devel] [PATCH v5 4/9] m25p80: change cur_addr to 32 bit integer Cédric Le Goater
2016-06-28 18:24 ` [Qemu-devel] [PATCH v5 5/9] m25p80: qdev-ify drive property Cédric Le Goater
2016-06-28 18:24 ` [Qemu-devel] [PATCH v5 6/9] ast2400: add SMC controllers (FMC and SPI) Cédric Le Goater
2016-06-29  7:58   ` Cédric Le Goater
2016-07-02 17:00     ` mar.krzeminski
2016-07-04  6:58       ` Cédric Le Goater
2016-07-04  7:12         ` Marcin Krzemiński [this message]
2016-06-28 18:24 ` [Qemu-devel] [PATCH v5 7/9] ast2400: add SPI flash slaves Cédric Le Goater
2016-07-01 16:24   ` Peter Maydell
2016-07-01 16:44     ` Cédric Le Goater
2016-07-01 17:00       ` Peter Maydell
2016-07-02 17:08   ` mar.krzeminski
2016-07-02 17:51     ` mar.krzeminski
2016-06-28 18:24 ` [Qemu-devel] [PATCH v5 8/9] ast2400: create " Cédric Le Goater
2016-07-01 15:19   ` Peter Maydell
2016-06-28 18:24 ` [Qemu-devel] [PATCH v5 9/9] tests: add a m25p80 test Cédric Le Goater
2016-07-01 17:18   ` Peter Maydell
2016-07-01 17:22     ` Peter Maydell
2016-07-01 17:30     ` Cédric Le Goater
2016-07-01 21:46       ` Greg Kurz
2016-07-02 18:05   ` mar.krzeminski
2016-07-04  9:15     ` Cédric Le Goater
2016-07-04  9:50       ` Cédric Le Goater
2016-07-04 11:14       ` Peter Maydell
2016-07-04 12:01         ` Cédric Le Goater
2016-07-04 12:11           ` Peter Maydell
2016-07-04 12:32             ` Cédric Le Goater
2016-07-01 16:25 ` [Qemu-devel] [PATCH v5 0/9] ast2400: SMC controllers Peter Maydell

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