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From: Paolo Bonzini <pbonzini@redhat.com>
To: Xiaoyao Li <xiaoyao.li@intel.com>
Cc: qemu-devel@nongnu.org, pankaj.gupta@amd.com
Subject: Re: [PATCH] target/i386: SEV: do not assume machine->cgs is SEV
Date: Thu, 6 Jun 2024 18:10:40 +0200	[thread overview]
Message-ID: <CABgObfYoKTURRorC_33qFC-SFxx9zvgqe0hLeQD2yLn8hApp5w@mail.gmail.com> (raw)
In-Reply-To: <ae827bce-41d7-450c-8fe8-69df55430bd0@intel.com>

On Thu, Jun 6, 2024 at 6:07 PM Xiaoyao Li <xiaoyao.li@intel.com> wrote:
>
> On 6/6/2024 6:44 AM, Paolo Bonzini wrote:
> > There can be other confidential computing classes that are not derived
> > from sev-common.  Avoid aborting when encountering them.
>
> I hit it today when rebasing TDX patches to latest QEMU master, which
> has the SEV-SNP series merged. (I didn't get time to review it between
> it gets merged.)
>
> my approach is to guard with sev_enabled() when calling
> sev_es_set_reset_vector() in kvm_arch_reset_vcpu(), because calling sev*
> specific function in generic kvm code doesn't look reasonable to me.

On the other hand I would like to avoid too many sev/tdx conditionals
in common code.  Neither choice is great.

Another possibility is to make this a X86ConfidentialGuest method, if
the TDX code has anything similar.

Feel free to keep this patch, or anything that replaces it, in your TDX series.

Apart from this issue, I could rebase the previous TDX patches on top
of SEV-SNP without any problems.

Paolo



      reply	other threads:[~2024-06-06 16:12 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-05 22:44 [PATCH] target/i386: SEV: do not assume machine->cgs is SEV Paolo Bonzini
2024-06-06  3:45 ` Zhao Liu
2024-06-06  3:52   ` Richard Henderson
2024-06-06  6:32     ` Paolo Bonzini
2024-06-06 16:06 ` Xiaoyao Li
2024-06-06 16:10   ` Paolo Bonzini [this message]

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