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Thu, 08 Feb 2024 00:12:05 -0800 (PST) X-Google-Smtp-Source: AGHT+IEK8XQJViIIOWkZ5qDewElO6yPvzbLvsc674QjACOiTLZ5I1LjGrJ2/yt6Uzs1u6tXf5XXpBm9B5sjCQ3Fxvoc= X-Received: by 2002:a05:6102:5110:b0:46d:3625:6d67 with SMTP id bm16-20020a056102511000b0046d36256d67mr6262467vsb.14.1707379925188; Thu, 08 Feb 2024 00:12:05 -0800 (PST) MIME-Version: 1.0 References: <20240207111411.115040-1-pbonzini@redhat.com> <20240207111411.115040-4-pbonzini@redhat.com> <078c8c89-f468-43d1-9ca6-4c485f09c9ba@linaro.org> In-Reply-To: <078c8c89-f468-43d1-9ca6-4c485f09c9ba@linaro.org> From: Paolo Bonzini Date: Thu, 8 Feb 2024 09:11:52 +0100 Message-ID: Subject: Re: [PATCH v2 3/8] hw/mips/Kconfig: Remove ISA dependencies from MIPSsim board To: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= Cc: qemu-devel@nongnu.org, shentey@gmail.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.106, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Wed, Feb 7, 2024 at 7:58=E2=80=AFPM Philippe Mathieu-Daud=C3=A9 wrote: > > @@ -6,8 +6,7 @@ config MALTA > > > > config MIPSSIM > > bool > > - select ISA_BUS > > - select SERIAL_ISA > > + select SERIAL > > Hmm there is an ISA bus which can be exposed with: > > -- >8 -- > diff --git a/hw/mips/mipssim.c b/hw/mips/mipssim.c > index 16af31648e..a1a4688861 100644 > --- a/hw/mips/mipssim.c > +++ b/hw/mips/mipssim.c > @@ -209,8 +209,9 @@ mips_mipssim_init(MachineState *machine) > /* Register 64 KB of ISA IO space at 0x1fd00000. */ > memory_region_init_alias(isa, NULL, "isa_mmio", > get_system_io(), 0, 0x00010000); > memory_region_add_subregion(get_system_memory(), 0x1fd00000, isa); > + isa_bus_new(NULL, get_system_memory(), get_system_io(), &error_abort= ); Quoting you from https://lists.gnu.org/archive/html/qemu-devel/2020-09/msg08752.html, "there is an ISA MMIO space mapped at 0x1fd00000, however this is not a real ISA bus (no ISA IRQ)". If mipssim cannot support "-device isa-serial" as a replacement for "-serial", there's no reason for it to expose the bus. In the end, -device support is the main thing that an ISA bus provides over sysbus, and if it cannot work due to the missing interrupts, I think this patch is correct. I can add a comment: diff --git a/hw/mips/mipssim.c b/hw/mips/mipssim.c index 01e323904d9..47b37b454e7 100644 --- a/hw/mips/mipssim.c +++ b/hw/mips/mipssim.c @@ -204,7 +204,11 @@ mips_mipssim_init(MachineState *machine) cpu_mips_irq_init_cpu(cpu); cpu_mips_clock_init(cpu); - /* Register 64 KB of ISA IO space at 0x1fd00000. */ + /* + * Register 64 KB of ISA IO space at 0x1fd00000. But without interrup= ts + * (except for the hardcoded serial port interrupt) -device cannot wor= k, + * so do not expose the ISA bus to the user. + */ memory_region_init_alias(isa, NULL, "isa_mmio", get_system_io(), 0, 0x00010000); memory_region_add_subregion(get_system_memory(), 0x1fd00000, isa); Paolo > /* > * A single 16450 sits at offset 0x3f8. It is attached to > * MIPS CPU INT2, which is interrupt 4. > --- >