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Thu, 11 Dec 2025 18:06:16 -0800 (PST) X-Google-Smtp-Source: AGHT+IHu7X3kWyjOydNCgVcWT1VCFZMC+JnzNbsqJMJB5fDXHEIEMXLbFaEMaQbfaO+8RwL2VkgmBEUpv4aQBRNdako= X-Received: by 2002:a05:6000:2507:b0:42b:3ad7:fdd4 with SMTP id ffacd0b85a97d-42fb44d45bamr308068f8f.3.1765505175824; Thu, 11 Dec 2025 18:06:15 -0800 (PST) MIME-Version: 1.0 References: <20251210131653.852163-1-pbonzini@redhat.com> <20251210131653.852163-2-pbonzini@redhat.com> <755aed45-4ebf-4828-817a-ebe6106ea2ad@linaro.org> In-Reply-To: <755aed45-4ebf-4828-817a-ebe6106ea2ad@linaro.org> From: Paolo Bonzini Date: Fri, 12 Dec 2025 03:06:04 +0100 X-Gm-Features: AQt7F2pauVbnsJB5wlPYktJDnzL-ewpQ93wVdqA8EnUQwzxtW5Wi431lEfo7rKk Message-ID: Subject: Re: [PATCH 01/18] target/i386/tcg: fix check for invalid VSIB instruction To: Richard Henderson Cc: qemu-devel , qemu-stable Content-Type: multipart/alternative; boundary="000000000000dac16a0645b7b4a1" Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HTML_MESSAGE=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org --000000000000dac16a0645b7b4a1 Content-Type: text/plain; charset="UTF-8" Il gio 11 dic 2025, 23:22 Richard Henderson ha scritto: > > Yes, I was confused by the comment and by QEMU's incorrect decoding > logic: > > > > if (CODE32(s) && !VM86(s)) { > > > > which should be changed to > > > > if (PE(s) && !VM86(s)) { > > I can't find the language for that. Can you point me at it? > It's the exception condition tables. They all mention that you get #UD for the VEX prefix in real or vm86 mode. Several BMI instructions also have language like "This instruction is not supported in real mode and virtual-8086 mode". Paolo > > And by the way, this also means that we need either separate helpers > > for 32- and 64-bit addresses, or a mask argument. > > Of course. > > > r~ > > --000000000000dac16a0645b7b4a1 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable


Il gio 11 dic 2025, 23:22 Richard Henderson <richard.henderson@linaro.org> ha scritto:
> Yes, I was confused by the comment and by QEMU's incorrect decodin= g logic:
>
>=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (CODE32(s) && !VM86(s)) {=
>
> which should be changed to
>
>=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0if (PE(s) && !VM86(s)) {

I can't find the language for that.=C2=A0 Can you point me at it?

It'= ;s the exception condition tables. They all mention that you get #UD for th= e VEX prefix in real or vm86 mode.

Several BMI instructions also have language like "This inst= ruction is not supported in real mode and virtual-8086 mode".

Paolo

> And by the way, this also means that we need either separate helpers > for 32- and 64-bit addresses, or a mask argument.

Of course.


r~

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