* [Qemu-devel] [Aarch64] Bug in add/sub extended reg
@ 2014-02-20 11:51 Laurent Desnogues
2014-02-20 12:25 ` Peter Maydell
0 siblings, 1 reply; 2+ messages in thread
From: Laurent Desnogues @ 2014-02-20 11:51 UTC (permalink / raw)
To: qemu-devel@nongnu.org
Hello,
there's a bug in SP handling in disas_add_sub_ext_reg:
/* non-flag setting ops may use SP */
if (!setflags) {
tcg_rn = read_cpu_reg_sp(s, rn, sf);
tcg_rd = cpu_reg_sp(s, rd);
} else {
tcg_rn = read_cpu_reg(s, rn, sf);
tcg_rd = cpu_reg(s, rd);
}
rn can always be SP no matter whether flags are set or not.
Thanks,
Laurent
^ permalink raw reply [flat|nested] 2+ messages in thread* Re: [Qemu-devel] [Aarch64] Bug in add/sub extended reg
2014-02-20 11:51 [Qemu-devel] [Aarch64] Bug in add/sub extended reg Laurent Desnogues
@ 2014-02-20 12:25 ` Peter Maydell
0 siblings, 0 replies; 2+ messages in thread
From: Peter Maydell @ 2014-02-20 12:25 UTC (permalink / raw)
To: Laurent Desnogues; +Cc: Alex Bennée, qemu-devel@nongnu.org
On 20 February 2014 11:51, Laurent Desnogues
<laurent.desnogues@gmail.com> wrote:
> Hello,
>
> there's a bug in SP handling in disas_add_sub_ext_reg:
>
> /* non-flag setting ops may use SP */
> if (!setflags) {
> tcg_rn = read_cpu_reg_sp(s, rn, sf);
> tcg_rd = cpu_reg_sp(s, rd);
> } else {
> tcg_rn = read_cpu_reg(s, rn, sf);
> tcg_rd = cpu_reg(s, rd);
> }
>
> rn can always be SP no matter whether flags are set or not.
Yep, pseudocode agrees:
bits(datasize) operand1 = if n == 31 then SP[] else X[n];
It's only Rd that has this "31 means SP only if
we're not setting flags" behaviour.
thanks
-- PMM
^ permalink raw reply [flat|nested] 2+ messages in thread
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2014-02-20 11:51 [Qemu-devel] [Aarch64] Bug in add/sub extended reg Laurent Desnogues
2014-02-20 12:25 ` Peter Maydell
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