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From: Laurent Desnogues <laurent.desnogues@gmail.com>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-arm <qemu-arm@nongnu.org>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Subject: Re: ARM SVE issues with non "standard" vector lengths
Date: Thu, 23 Apr 2020 18:24:52 +0200	[thread overview]
Message-ID: <CABoDooPSYj5ujXj-jKTrBDVFDO3fp=k6ev+Sf=4EgtG7R_kX9Q@mail.gmail.com> (raw)
In-Reply-To: <5c5d4c91-c819-8bb5-2dc7-784cbdbfb789@linaro.org>

On Thu, Apr 23, 2020 at 5:19 PM Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> On 4/23/20 6:59 AM, Laurent Desnogues wrote:
> > 2. sve_zip_p
> >
> > This generates extraneous data in the higher part of the result.
> >
> > I hit this when I got a wrong result on an instruction that ends up
> > using sve_cntp which counts all bits set in each 64-bit chunk. There
> > might be some other instructions beyond ZIP that generate extra data
> > that would break sve_cntp.  So perhaps it'd be easier to fix sve_cmtp
> > (and hope that it's the only function that uses bits beyond vector
> > length...).
>
> There are quite a few places that assume (and some that assert, such as the
> load/store paths) that there are no predicate bits set beyond VL.
>
> I will fix zip.

Looking at the code I think sve_punpk_p is affected too.

Thanks,

Laurent

>
>
> r~


       reply	other threads:[~2020-04-23 17:18 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CABoDooMSCvi4sxWS-a3cQksD3V5tnHCUbGPsxW69Ou4d1rpQZQ@mail.gmail.com>
     [not found] ` <5c5d4c91-c819-8bb5-2dc7-784cbdbfb789@linaro.org>
2020-04-23 16:24   ` Laurent Desnogues [this message]
2020-04-25 19:28     ` ARM SVE issues with non "standard" vector lengths Richard Henderson
2020-04-25 18:49 ` Richard Henderson
2020-04-25 19:00   ` Richard Henderson

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