Re: [PATCH 05/13] target/hexagon: add v68 HVX IEEE float min/max insns

[Matheus Bernardino <matheus.bernardino@oss.qualcomm.com>]

On Mon, Mar 23, 2026 at 5:48 PM Taylor Simpson <ltaylorsimpson@gmail.com> wrote:
>
>
>
> On Mon, Mar 23, 2026 at 7:15 AM Matheus Tavares Bernardino <matheus.bernardino@oss.qualcomm.com> wrote:
>>
>> Add HVX IEEE floating-point min/max instructions:
>> - vfmin_hf, vfmin_sf: IEEE floating-point minimum
>> - vfmax_hf, vfmax_sf: IEEE floating-point maximum
>> - vmax_hf, vmax_sf: qfloat IEEE maximum
>> - vmin_hf, vmin_sf: qfloat IEEE minimum
>>
>> The Hexagon qfloat variants are similar to the IEEE-754 ones, but they
>> handle NaN slightly differently. See comment on kvx_ieee.h
>>
>> Signed-off-by: Matheus Tavares Bernardino <matheus.bernardino@oss.qualcomm.com>
>> ---
>>  target/hexagon/mmvec/kvx_ieee.h              | 12 +++++
>>  target/hexagon/mmvec/kvx_ieee.c              | 46 ++++++++++++++++++++
>>  target/hexagon/imported/mmvec/encode_ext.def | 11 +++++
>>  target/hexagon/imported/mmvec/ext.idef       | 28 +++++++++++-
>>  4 files changed, 96 insertions(+), 1 deletion(-)
>>
>> diff --git a/target/hexagon/mmvec/kvx_ieee.h b/target/hexagon/mmvec/kvx_ieee.h
>> index e92ddebeb9..78f546eb8e 100644
>> --- a/target/hexagon/mmvec/kvx_ieee.h
>> +++ b/target/hexagon/mmvec/kvx_ieee.h
>> @@ -44,4 +44,16 @@ uint32_t fp_vdmpy(uint16_t a1, uint16_t a2, uint16_t a3, uint16_t a4,
>>  uint32_t fp_vdmpy_acc(uint32_t acc, uint16_t a1, uint16_t a2, uint16_t a3,
>>                        uint16_t a4, float_status *fp_status);
>>
>> +/* IEEE - FP min/max instructions */
>> +uint32_t fp_min_sf(uint32_t a1, uint32_t a2, float_status *fp_status);
>> +uint32_t fp_max_sf(uint32_t a1, uint32_t a2, float_status *fp_status);
>> +uint16_t fp_min_hf(uint16_t a1, uint16_t a2, float_status *fp_status);
>> +uint16_t fp_max_hf(uint16_t a1, uint16_t a2, float_status *fp_status);
>> +
>> +/* Qfloat min/max treat +NaN as greater than +INF and -NaN as smaller than -INF */
>> +uint32_t qf_max_sf(uint32_t a1, uint32_t a2, float_status *fp_status);
>> +uint32_t qf_min_sf(uint32_t a1, uint32_t a2, float_status *fp_status);
>> +uint16_t qf_max_hf(uint16_t a1, uint16_t a2, float_status *fp_status);
>> +uint16_t qf_min_hf(uint16_t a1, uint16_t a2, float_status *fp_status);
>
>
> Why are we including Qfloat stuff in a patch series for IEEE float?

Well, good point. We can separate those. I've only included them here
because their semantics are very similar to the respective IEEE
variants, and they are more common in Hexagon code as the IEEE
variants need the extension, which is not available in all cores.

>>
>> +
>>  #endif
>> diff --git a/target/hexagon/imported/mmvec/encode_ext.def b/target/hexagon/imported/mmvec/encode_ext.def
>> index 4ce87d09fd..23fbb75743 100644
>> --- a/target/hexagon/imported/mmvec/encode_ext.def
>> +++ b/target/hexagon/imported/mmvec/encode_ext.def
>> @@ -823,4 +823,15 @@ DEF_ENC(V6_vsub_sf_hf,"00011111100vvvvvPP1uuuuu101ddddd")
>>  DEF_ENC(V6_vadd_hf_hf,"00011111101vvvvvPP1uuuuu111ddddd")
>>  DEF_ENC(V6_vsub_hf_hf,"00011111011vvvvvPP1uuuuu000ddddd")
>>
>> +/* IEEE FP min/max instructions */
>> +DEF_ENC(V6_vfmin_hf,"00011100011vvvvvPP1uuuuu000ddddd")
>> +DEF_ENC(V6_vfmin_sf,"00011100011vvvvvPP1uuuuu001ddddd")
>> +DEF_ENC(V6_vfmax_hf,"00011100011vvvvvPP1uuuuu010ddddd")
>> +DEF_ENC(V6_vfmax_sf,"00011100011vvvvvPP1uuuuu011ddddd")
>> +DEF_ENC(V6_vmax_sf,"00011111110vvvvvPP1uuuuu001ddddd")
>> +DEF_ENC(V6_vmin_sf,"00011111110vvvvvPP1uuuuu010ddddd")
>> +DEF_ENC(V6_vmax_hf,"00011111110vvvvvPP1uuuuu011ddddd")
>> +DEF_ENC(V6_vmin_hf,"00011111110vvvvvPP1uuuuu100ddddd")
>> +DEF_ENC(V6_vcvt_ub_hf,"00011111110vvvvvPP1uuuuu101ddddd")
>
>
> Minor nit - this is a conversion instruction and is repeated in patch 7.  Remove it from this patch.

Will do, thanks.