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envelope-from=matheus.bernardino@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Mon, Mar 23, 2026 at 6:26=E2=80=AFPM Taylor Simpson wrote: > > > > On Mon, Mar 23, 2026 at 7:16=E2=80=AFAM Matheus Tavares Bernardino wrote: >> >> >> diff --git a/target/hexagon/mmvec/kvx_ieee.c b/target/hexagon/mmvec/kvx_= ieee.c >> index 33621a15f3..bbeec09707 100644 >> --- a/target/hexagon/mmvec/kvx_ieee.c >> +++ b/target/hexagon/mmvec/kvx_ieee.c >> @@ -131,3 +131,101 @@ uint16_t qf_min_hf(uint16_t a1, uint16_t a2, float= _status *fp_status) >> if (float16_is_pos_nan(f2) || float16_is_neg_nan(f1)) return a1; >> return fp_min_hf(a1, a2, fp_status); >> } >> + >> +uint16_t f16_to_uh(uint16_t op1, float_status *fp_status) >> +{ >> + return float16_to_uint16_scalbn(make_float16(op1), >> + float_round_nearest_even, > > > Does HVX always use this rounding mode? The scalar core uses the roundin= g mode in USR. Yeah, almost always this mode, with the exception of some instructions. It's not configurable via USR (or anything else). >> + >> +int32_t conv_w_sf(uint32_t a, float_status *fp_status) >> +{ >> + float_status scratch_fpst =3D {}; >> + const float32 W_MAX =3D int32_to_float32(INT32_MAX, &scratch_fpst); >> + const float32 W_MIN =3D int32_to_float32(INT32_MIN, &scratch_fpst); >> + float32 f1 =3D make_float32(a); >> + >> + if (float32_is_any_nan(f1) || float32_is_infinity(f1) || >> + float32_le_quiet(W_MAX, f1, fp_status) || >> + float32_le_quiet(f1, W_MIN, fp_status)) { >> + return float32_is_neg(f1) ? INT32_MIN : INT32_MAX; >> + } > > > Does float32_to_int32 handle these checks? Hmm, I don't think they are exactly the same. For example, float32_to_int32 will return INT32_MAX for any NAN. But the hexagon implementation here returns INT32_MIN for negative NAN. >> >> + return float32_to_int32_round_to_zero(f1, fp_status); > > > Rounding mode? This is one of those exceptions I mentioned earlier.