From: Jose Martins <josemartins90@gmail.com>
To: Alistair Francis <alistair23@gmail.com>
Cc: Alistair Francis <alistair.francis@wdc.com>,
"open list:RISC-V" <qemu-riscv@nongnu.org>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>
Subject: Re: [PATCH 1/1] target/riscv: fix VS interrupts forwarding to HS
Date: Wed, 29 Apr 2020 22:08:12 +0100 [thread overview]
Message-ID: <CAC41xo32aWNZteKP-95AtFXQo3w_Ey-7MA0-dL_uJmEMScAuhg@mail.gmail.com> (raw)
In-Reply-To: <CAKmqyKPJ6QqUULrDj9NX_bLdnjsjzPOGcCBH5q23fG=ScT_NzA@mail.gmail.com>
> Your change just made it true for whenever virtulisation is enabled
> (in which case we don't need it).
This is exactly my point. As I said in the commit message, the spec
clearly tells us that "Interrupts for higher-privilege modes, y>x, are
always globally enabled regardless of the setting of the global yIE
bit for the higher-privilege mode.". HS is clearly a higher-privilege
mode than either VS or VU. So, if virtualization is enabled, HS level
interrupts must be considered enabled independently of the state of
the actual sie bit in mstatus_hs.
next prev parent reply other threads:[~2020-04-29 21:09 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-18 18:01 [PATCH 1/1] target/riscv: fix VS interrupts forwarding to HS Jose Martins
2020-04-27 21:40 ` Alistair Francis
2020-04-29 16:06 ` Jose Martins
2020-04-29 18:43 ` Alistair Francis
2020-04-29 21:08 ` Jose Martins [this message]
2020-04-30 19:33 ` Alistair Francis
2020-04-30 21:47 ` Jose Martins
2020-05-01 18:56 ` Jose Martins
2020-05-05 19:54 ` Alistair Francis
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