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Thu, 26 Sep 2024 21:08:23 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHlo6ETK2Ecj6Be6hry6At158timW1IXMKPfnVoKW04LiaBes2eeQ4gUqEzyorbd6hxzzv+/8ICYgTk/Bng8aA= X-Received: by 2002:a17:90a:ad87:b0:2c8:6bfa:bbf1 with SMTP id 98e67ed59e1d1-2e0b8d55554mr2492655a91.23.1727410103142; Thu, 26 Sep 2024 21:08:23 -0700 (PDT) MIME-Version: 1.0 References: <20240911052255.1294071-1-zhenzhong.duan@intel.com> <20240911052255.1294071-13-zhenzhong.duan@intel.com> In-Reply-To: <20240911052255.1294071-13-zhenzhong.duan@intel.com> From: Jason Wang Date: Fri, 27 Sep 2024 12:08:10 +0800 Message-ID: Subject: Re: [PATCH v3 12/17] intel_iommu: Add support for PASID-based device IOTLB invalidation To: Zhenzhong Duan Cc: qemu-devel@nongnu.org, alex.williamson@redhat.com, clg@redhat.com, eric.auger@redhat.com, mst@redhat.com, peterx@redhat.com, jgg@nvidia.com, nicolinc@nvidia.com, joao.m.martins@oracle.com, clement.mathieu--drif@eviden.com, kevin.tian@intel.com, yi.l.liu@intel.com, chao.p.peng@intel.com, Paolo Bonzini , Richard Henderson , Eduardo Habkost , Marcel Apfelbaum Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=170.10.129.124; envelope-from=jasowang@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.131, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Wed, Sep 11, 2024 at 1:27=E2=80=AFPM Zhenzhong Duan wrote: > > From: Cl=C3=A9ment Mathieu--Drif > > Signed-off-by: Cl=C3=A9ment Mathieu--Drif > Signed-off-by: Zhenzhong Duan > --- > hw/i386/intel_iommu_internal.h | 11 ++++++++ > hw/i386/intel_iommu.c | 50 ++++++++++++++++++++++++++++++++++ > 2 files changed, 61 insertions(+) > > diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_interna= l.h > index 4f2c3a9350..52bdbf3bc5 100644 > --- a/hw/i386/intel_iommu_internal.h > +++ b/hw/i386/intel_iommu_internal.h > @@ -375,6 +375,7 @@ typedef union VTDInvDesc VTDInvDesc; > #define VTD_INV_DESC_WAIT 0x5 /* Invalidation Wait Descrip= tor */ > #define VTD_INV_DESC_PIOTLB 0x6 /* PASID-IOTLB Invalidate De= sc */ > #define VTD_INV_DESC_PC 0x7 /* PASID-cache Invalidate De= sc */ > +#define VTD_INV_DESC_DEV_PIOTLB 0x8 /* PASID-based-DIOTLB inv_de= sc*/ > #define VTD_INV_DESC_NONE 0 /* Not an Invalidate Descrip= tor */ > > /* Masks for Invalidation Wait Descriptor*/ > @@ -413,6 +414,16 @@ typedef union VTDInvDesc VTDInvDesc; > #define VTD_INV_DESC_DEVICE_IOTLB_RSVD_HI 0xffeULL > #define VTD_INV_DESC_DEVICE_IOTLB_RSVD_LO 0xffff0000ffe0fff8 > > +/* Mask for PASID Device IOTLB Invalidate Descriptor */ > +#define VTD_INV_DESC_PASID_DEVICE_IOTLB_ADDR(val) ((val) & \ > + 0xfffffffffffff000ULL= ) > +#define VTD_INV_DESC_PASID_DEVICE_IOTLB_SIZE(val) ((val >> 11) & 0x1) > +#define VTD_INV_DESC_PASID_DEVICE_IOTLB_GLOBAL(val) ((val) & 0x1) > +#define VTD_INV_DESC_PASID_DEVICE_IOTLB_SID(val) (((val) >> 16) & 0xffff= ULL) > +#define VTD_INV_DESC_PASID_DEVICE_IOTLB_PASID(val) ((val >> 32) & 0xffff= fULL) > +#define VTD_INV_DESC_PASID_DEVICE_IOTLB_RSVD_HI 0x7feULL > +#define VTD_INV_DESC_PASID_DEVICE_IOTLB_RSVD_LO 0xfff000000000f000ULL > + > /* Rsvd field masks for spte */ > #define VTD_SPTE_SNP 0x800ULL > > diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c > index d28c862598..4cf56924e1 100644 > --- a/hw/i386/intel_iommu.c > +++ b/hw/i386/intel_iommu.c > @@ -3017,6 +3017,49 @@ static void do_invalidate_device_tlb(VTDAddressSpa= ce *vtd_dev_as, > memory_region_notify_iommu(&vtd_dev_as->iommu, 0, event); > } > > +static bool vtd_process_device_piotlb_desc(IntelIOMMUState *s, > + VTDInvDesc *inv_desc) > +{ > + uint16_t sid; > + VTDAddressSpace *vtd_dev_as; > + bool size; > + bool global; > + hwaddr addr; > + uint32_t pasid; > + > + if ((inv_desc->hi & VTD_INV_DESC_PASID_DEVICE_IOTLB_RSVD_HI) || > + (inv_desc->lo & VTD_INV_DESC_PASID_DEVICE_IOTLB_RSVD_LO)) { > + error_report_once("%s: invalid pasid-based dev iotlb inv desc:" > + "hi=3D%"PRIx64 "(reserved nonzero)", > + __func__, inv_desc->hi); > + return false; > + } > + > + global =3D VTD_INV_DESC_PASID_DEVICE_IOTLB_GLOBAL(inv_desc->hi); > + size =3D VTD_INV_DESC_PASID_DEVICE_IOTLB_SIZE(inv_desc->hi); > + addr =3D VTD_INV_DESC_PASID_DEVICE_IOTLB_ADDR(inv_desc->hi); > + sid =3D VTD_INV_DESC_PASID_DEVICE_IOTLB_SID(inv_desc->lo); > + if (global) { > + QLIST_FOREACH(vtd_dev_as, &s->vtd_as_with_notifiers, next) { > + if ((vtd_dev_as->pasid !=3D PCI_NO_PASID) && > + (PCI_BUILD_BDF(pci_bus_num(vtd_dev_as->bus), > + vtd_dev_as->devfn) =3D=3D sid= )) { > + do_invalidate_device_tlb(vtd_dev_as, size, addr); > + } > + } > + } else { > + pasid =3D VTD_INV_DESC_PASID_DEVICE_IOTLB_PASID(inv_desc->lo); > + vtd_dev_as =3D vtd_get_as_by_sid_and_pasid(s, sid, pasid); > + if (!vtd_dev_as) { > + return true; > + } > + > + do_invalidate_device_tlb(vtd_dev_as, size, addr); Question: I wonder if current vhost (which has a device IOTLB abstraction via virtio-pci) can work with this (PASID based IOTLB invalidation) THanks > + } > + > + return true; > +} > + > static bool vtd_process_device_iotlb_desc(IntelIOMMUState *s, > VTDInvDesc *inv_desc) > { > @@ -3111,6 +3154,13 @@ static bool vtd_process_inv_desc(IntelIOMMUState *= s) > } > break; > > + case VTD_INV_DESC_DEV_PIOTLB: > + trace_vtd_inv_desc("device-piotlb", inv_desc.hi, inv_desc.lo); > + if (!vtd_process_device_piotlb_desc(s, &inv_desc)) { > + return false; > + } > + break; > + > case VTD_INV_DESC_DEVICE: > trace_vtd_inv_desc("device", inv_desc.hi, inv_desc.lo); > if (!vtd_process_device_iotlb_desc(s, &inv_desc)) { > -- > 2.34.1 >