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Thu, 26 Sep 2024 21:08:34 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEGN9B+rO4TOZgBkaUPn/OyU7JInHLbvx4Do7glLrtUBcP2u5n0Duz3lu6TrQauJinElKIErhDFq0L12jaPwpM= X-Received: by 2002:a17:90b:11cd:b0:2d4:bf3:428e with SMTP id 98e67ed59e1d1-2e0b8ec7051mr2564103a91.37.1727410114120; Thu, 26 Sep 2024 21:08:34 -0700 (PDT) MIME-Version: 1.0 References: <20240911052255.1294071-1-zhenzhong.duan@intel.com> <20240911052255.1294071-17-zhenzhong.duan@intel.com> In-Reply-To: <20240911052255.1294071-17-zhenzhong.duan@intel.com> From: Jason Wang Date: Fri, 27 Sep 2024 12:08:21 +0800 Message-ID: Subject: Re: [PATCH v3 16/17] intel_iommu: Introduce a property to control FS1GP cap bit setting To: Zhenzhong Duan Cc: qemu-devel@nongnu.org, alex.williamson@redhat.com, clg@redhat.com, eric.auger@redhat.com, mst@redhat.com, peterx@redhat.com, jgg@nvidia.com, nicolinc@nvidia.com, joao.m.martins@oracle.com, clement.mathieu--drif@eviden.com, kevin.tian@intel.com, yi.l.liu@intel.com, chao.p.peng@intel.com, Paolo Bonzini , Richard Henderson , Eduardo Habkost , Marcel Apfelbaum Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=170.10.133.124; envelope-from=jasowang@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.131, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Wed, Sep 11, 2024 at 1:27=E2=80=AFPM Zhenzhong Duan wrote: > > This gives user flexibility to turn off FS1GP for debug purpose. > > It is also useful for future nesting feature. When host IOMMU doesn't > support FS1GP but vIOMMU does, nested page table on host side works > after turn FS1GP off in vIOMMU. > > This property has no effect when vIOMMU isn't in scalable modern > mode. It looks to me there's no need to have an "x" prefix for this. Other looks good. > > Signed-off-by: Zhenzhong Duan > Reviewed-by: Cl=C3=A9ment Mathieu--Drif > --- > include/hw/i386/intel_iommu.h | 1 + > hw/i386/intel_iommu.c | 5 ++++- > 2 files changed, 5 insertions(+), 1 deletion(-) > > diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.= h > index 650641544c..f6d9b41b80 100644 > --- a/include/hw/i386/intel_iommu.h > +++ b/include/hw/i386/intel_iommu.h > @@ -308,6 +308,7 @@ struct IntelIOMMUState { > bool dma_drain; /* Whether DMA r/w draining enabled = */ > bool dma_translation; /* Whether DMA translation supported= */ > bool pasid; /* Whether to support PASID */ > + bool fs1gp; /* First Stage 1-GByte Page Support = */ > > /* > * Protects IOMMU states in general. Currently it protects the > diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c > index bb3ed48281..8b40aace8b 100644 > --- a/hw/i386/intel_iommu.c > +++ b/hw/i386/intel_iommu.c > @@ -3779,6 +3779,7 @@ static Property vtd_properties[] =3D { > DEFINE_PROP_BOOL("x-pasid-mode", IntelIOMMUState, pasid, false), > DEFINE_PROP_BOOL("dma-drain", IntelIOMMUState, dma_drain, true), > DEFINE_PROP_BOOL("dma-translation", IntelIOMMUState, dma_translation= , true), > + DEFINE_PROP_BOOL("x-cap-fs1gp", IntelIOMMUState, fs1gp, true), > DEFINE_PROP_END_OF_LIST(), > }; > > @@ -4507,7 +4508,9 @@ static void vtd_cap_init(IntelIOMMUState *s) > /* TODO: read cap/ecap from host to decide which cap to be exposed. = */ > if (s->scalable_modern) { > s->ecap |=3D VTD_ECAP_SMTS | VTD_ECAP_FLTS; > - s->cap |=3D VTD_CAP_FS1GP; > + if (s->fs1gp) { > + s->cap |=3D VTD_CAP_FS1GP; > + } > } else if (s->scalable_mode) { > s->ecap |=3D VTD_ECAP_SMTS | VTD_ECAP_SRS | VTD_ECAP_SLTS; > } > -- > 2.34.1 > Thanks