From: Artyom Tarasenko <atar4qemu@gmail.com>
To: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Cc: qemu-devel <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH 11/15] apb: split pci_pbm_map_irq() into separate functions for bus A and bus B
Date: Tue, 19 Dec 2017 08:56:05 +0100 [thread overview]
Message-ID: <CACXAS8A1-aEWqw9xoYKY6ebxU3GztBUG2UDVyCrwsVy_kcKWrw@mail.gmail.com> (raw)
In-Reply-To: <bc0ce243-e8aa-9f63-7c7c-68197b201209@ilande.co.uk>
On Sun, Dec 17, 2017 at 12:09 PM, Mark Cave-Ayland
<mark.cave-ayland@ilande.co.uk> wrote:
> On 19/11/17 11:06, Mark Cave-Ayland wrote:
>
>> On 17/11/17 14:33, Artyom Tarasenko wrote:
>>
>>> On Fri, Nov 17, 2017 at 2:42 PM, Mark Cave-Ayland
>>> <mark.cave-ayland@ilande.co.uk> wrote:
>>>>
>>>> After the previous refactoring it is now possible to use separate
>>>> functions
>>>> to improve clarity of the interrupt paths. Similarly by checking the PCI
>>>> devnfn to identify busA during apb_pci_bridge_realize() it becomes
>>>> possible
>>>> to completely remove the busA property from the PBMPCIBridge state.
>>>>
>>>> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
>>>> ---
>>>> hw/pci-host/apb.c | 54
>>>> ++++++++++++++++++---------------------------
>>>> include/hw/pci-host/apb.h | 3 ---
>>>> 2 files changed, 21 insertions(+), 36 deletions(-)
>>>>
>>>> diff --git a/hw/pci-host/apb.c b/hw/pci-host/apb.c
>>>> index 6c20285..268100e 100644
>>>> --- a/hw/pci-host/apb.c
>>>> +++ b/hw/pci-host/apb.c
>>>> @@ -517,32 +517,27 @@ static int pci_apb_map_irq(PCIDevice *pci_dev, int
>>>> irq_num)
>>>> return irq_num;
>>>> }
>>>>
>>>> -static int pci_pbm_map_irq(PCIDevice *pci_dev, int irq_num)
>>>> +static int pci_pbmA_map_irq(PCIDevice *pci_dev, int irq_num)
>>>> {
>>>> - PBMPCIBridge *br = PBM_PCI_BRIDGE(pci_bridge_get_device(
>>>> -
>>>> PCI_BUS(qdev_get_parent_bus(DEVICE(pci_dev)))));
>>>> -
>>>> - int bus_offset;
>>>> - if (br->busA) {
>>>> - bus_offset = 0x0;
>>>> + /* The on-board devices have fixed (legacy) OBIO intnos */
>>>> + switch (PCI_SLOT(pci_dev->devfn)) {
>>>> + case 1:
>>>> + /* Onboard NIC */
>>>> + return 0x21;
>>>> + case 3:
>>>> + /* Onboard IDE */
>>>> + return 0x20;
>>>> + default:
>>>> + /* Normal intno, fall through */
>>>> + break;
>>>> + }
>>>>
>>>> - /* The on-board devices have fixed (legacy) OBIO intnos */
>>>> - switch (PCI_SLOT(pci_dev->devfn)) {
>>>> - case 1:
>>>> - /* Onboard NIC */
>>>> - return 0x21;
>>>> - case 3:
>>>> - /* Onboard IDE */
>>>> - return 0x20;
>>>> + return ((PCI_SLOT(pci_dev->devfn) << 2) + irq_num) & 0x1f;
>>>> +}
>>>>
>>>> - default:
>>>> - /* Normal intno, fall through */
>>>> - break;
>>>> - }
>>>> - } else {
>>>> - bus_offset = 0x10;
>>>> - }
>>>> - return (bus_offset + (PCI_SLOT(pci_dev->devfn) << 2) + irq_num) &
>>>> 0x1f;
>>>> +static int pci_pbmB_map_irq(PCIDevice *pci_dev, int irq_num)
>>>> +{
>>>> + return (0x10 + (PCI_SLOT(pci_dev->devfn) << 2) + irq_num) & 0x1f;
>>>> }
>>>>
>>>> static void pci_apb_set_irq(void *opaque, int irq_num, int level)
>>>> @@ -593,7 +588,7 @@ static void apb_pci_bridge_realize(PCIDevice *dev,
>>>> Error **errp)
>>>>
>>>> /* If initialising busA, ensure that we allow IO transactions so
>>>> that
>>>> we get the early serial console until OpenBIOS configures the
>>>> bridge */
>>>> - if (br->busA) {
>>>> + if (dev->devfn == PCI_DEVFN(1, 1)) {
>>>
>>>
>>> I think the previous syntax was more explicit here. A comment would be
>>> nice.
>>
>>
>> Yes it's definitely something that isn't immediately obvious, which is
>> why I left the above comment in place explaining what the if() branch is
>> doing. Is there something in the comment that isn't particularly clear?
>>
>> Note one of the reasons for wanting to remove the busA property is that
>> where possible I'd like to reduce the code in the IRQ path, and while
>> the existing code works I am still unsure of the additional overhead of
>> the 2 levels of QOM type checking that the current approach requires for
>> each IRQ.
>
>
> Hi Artyom,
>
> Thinking about this a bit more during freeze, this is actually doing the
> opposite of what we want, as it requires the device realise function to
> behave differently depending upon how it is related to the PCI bus.
>
> How about swapping this out for a qdev bool property for APB named
> "enable-early-pci-io-access", setting it just for the PCI_DEVFN(1, 1) device
> containing the ebus and then alter the if() statement above to enable PCI IO
> access if the qdev property is set?
This does sound reasonable. I wonder if this has to be a qdev property though.
Doesn't the physical bridge have a software visible bit/register for it?
--
Regards,
Artyom Tarasenko
SPARC and PPC PReP under qemu blog: http://tyom.blogspot.com/search/label/qemu
next prev parent reply other threads:[~2017-12-19 7:56 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-17 13:42 [Qemu-devel] [PATCH 00/15] sun4u: tidy-up CPU, APB and ebus Mark Cave-Ayland
2017-11-17 13:42 ` [Qemu-devel] [PATCH 01/15] apb: move QOM macros and typedefs from apb.c to apb.h Mark Cave-Ayland
2017-11-17 14:24 ` Artyom Tarasenko
2017-11-17 15:40 ` Mark Cave-Ayland
2017-11-17 19:55 ` Artyom Tarasenko
2017-11-20 0:52 ` Philippe Mathieu-Daudé
2017-11-17 13:42 ` [Qemu-devel] [PATCH 02/15] sun4u: ebus QOMify tidy-up Mark Cave-Ayland
2017-11-17 18:02 ` Philippe Mathieu-Daudé
2017-11-17 13:42 ` [Qemu-devel] [PATCH 03/15] sun4u: move ISABus inside of EBusState Mark Cave-Ayland
2017-11-17 14:53 ` Artyom Tarasenko
2017-11-17 15:46 ` Mark Cave-Ayland
2017-11-17 19:58 ` Artyom Tarasenko
2017-11-19 14:53 ` Philippe Mathieu-Daudé
2017-11-17 13:42 ` [Qemu-devel] [PATCH 04/15] sun4u: remove pci_ebus_init() function Mark Cave-Ayland
2017-11-17 14:38 ` Artyom Tarasenko
2017-11-20 0:37 ` Philippe Mathieu-Daudé
2017-11-17 13:42 ` [Qemu-devel] [PATCH 05/15] sun4u: move initialisation of all ISABus devices into ebus_realize() Mark Cave-Ayland
2017-11-20 0:47 ` Philippe Mathieu-Daudé
2017-11-20 22:45 ` Mark Cave-Ayland
2017-11-17 13:42 ` [Qemu-devel] [PATCH 06/15] apb: APB QOMify tidy-up Mark Cave-Ayland
2017-11-20 0:48 ` Philippe Mathieu-Daudé
2017-11-17 13:42 ` [Qemu-devel] [PATCH 07/15] apb: return APBState from pci_apb_init() rather then PCIBus Mark Cave-Ayland
2017-11-17 19:08 ` Philippe Mathieu-Daudé
2017-11-17 13:42 ` [Qemu-devel] [PATCH 08/15] apb: use gpios to wire up the apb device to the SPARC CPU IRQs Mark Cave-Ayland
2017-11-20 17:41 ` Philippe Mathieu-Daudé
2017-11-17 13:42 ` [Qemu-devel] [PATCH 09/15] apb: move the two secondary PCI bridges objects into APBState Mark Cave-Ayland
2017-11-17 14:41 ` Artyom Tarasenko
2017-11-20 0:56 ` Philippe Mathieu-Daudé
2017-11-17 13:42 ` [Qemu-devel] [PATCH 10/15] apb: remove pci_apb_init() and instantiate APB device using qdev Mark Cave-Ayland
2017-11-17 14:37 ` Artyom Tarasenko
2017-11-20 17:51 ` Philippe Mathieu-Daudé
2017-11-20 22:50 ` Mark Cave-Ayland
2017-11-17 13:42 ` [Qemu-devel] [PATCH 11/15] apb: split pci_pbm_map_irq() into separate functions for bus A and bus B Mark Cave-Ayland
2017-11-17 14:33 ` Artyom Tarasenko
2017-11-19 11:06 ` Mark Cave-Ayland
2017-12-17 11:09 ` Mark Cave-Ayland
2017-12-19 7:56 ` Artyom Tarasenko [this message]
2017-12-19 9:27 ` Mark Cave-Ayland
2017-12-19 9:29 ` Artyom Tarasenko
2017-11-17 13:42 ` [Qemu-devel] [PATCH 12/15] ebus: wire up OBIO interrupts to APB pbm via qdev GPIOs Mark Cave-Ayland
2017-11-17 14:28 ` Artyom Tarasenko
2017-11-20 1:02 ` Philippe Mathieu-Daudé
2017-11-20 22:47 ` Mark Cave-Ayland
2017-11-17 13:42 ` [Qemu-devel] [PATCH 13/15] apb: replace OBIO interrupt numbers in pci_pbmA_map_irq() with constants Mark Cave-Ayland
2017-11-17 14:26 ` Artyom Tarasenko
2017-11-20 1:03 ` Philippe Mathieu-Daudé
2017-11-17 13:42 ` [Qemu-devel] [PATCH 14/15] sparc64: introduce trace-events for hw/sparc64 Mark Cave-Ayland
2017-11-17 14:36 ` Artyom Tarasenko
2017-11-19 15:14 ` Philippe Mathieu-Daudé
2017-11-20 22:43 ` Mark Cave-Ayland
2017-11-17 13:42 ` [Qemu-devel] [PATCH 15/15] sun4u: switch from EBUS_DPRINTF() macro to trace-events Mark Cave-Ayland
2017-11-17 19:10 ` Philippe Mathieu-Daudé
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