From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50305) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XmRiS-0006hR-LI for qemu-devel@nongnu.org; Thu, 06 Nov 2014 13:23:29 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XmRiR-0000i8-GI for qemu-devel@nongnu.org; Thu, 06 Nov 2014 13:23:28 -0500 Received: from mail-yh0-x22e.google.com ([2607:f8b0:4002:c01::22e]:37769) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XmRiR-0000hv-BV for qemu-devel@nongnu.org; Thu, 06 Nov 2014 13:23:27 -0500 Received: by mail-yh0-f46.google.com with SMTP id c41so1649269yho.5 for ; Thu, 06 Nov 2014 10:23:26 -0800 (PST) MIME-Version: 1.0 In-Reply-To: <545BB1AA.9020106@epfl.ch> References: <545B256F.8050008@epfl.ch> <545BB1AA.9020106@epfl.ch> From: Artyom Tarasenko Date: Thu, 6 Nov 2014 19:23:06 +0100 Message-ID: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] Adding SMP support for Sparc Target List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Damien Hilloulin Cc: Mark Cave-Ayland , qemu-devel On Thu, Nov 6, 2014 at 6:36 PM, Damien Hilloulin wrote: > Le 06/11/2014 16:27, Artyom Tarasenko a =C3=A9crit : >> >> Hello Damien, >> >> On Thu, Nov 6, 2014 at 8:38 AM, Damien Hilloulin >> wrote: >>> >>> Hello everyone, >>> >>> I'm a newcomer in QEMU and my goal would be to port an existing system >>> simulator using another emulator to QEMU. >>> Some work has already been done, and Sparc has been the main target so >>> far >>> because of its simplicity (and because we have a very good support for >>> Sparc >>> with the other emulator). >>> QEMU is great, open-source (contrary to the other emulator we have been >>> using in the past), and that's why we are aiming at using it. >>> >>> However, it seems that the Sparc targets doesn't really support SMP/CMT >>> as >>> of now. So I am considering two possibilities: >>> - adding SMP support in QEMU for the Sparc targets (and contribute it t= o >>> QEMU :) ) >> >> Do you mean a) emulating multiple guest cores on in a single host >> thread, or b) emulating multiple guest cores in multiple host threads? > > a) Would be enough for us (but b) would be amazing) ! >> >> The former (a) should be relative easy for a sun4m platform: just have >> to put the CPUs at the proper place in the system bus and fill the CPU >> Module Ids (MIDs) with the proper data. > > Could you please explain it with some more details? I don't really know h= ow > to do that (yet)... > We are really interested in such a support for Sparc64, so I think that i= t > would be for sun4u machines only. > Would the changes would be the same or would there be more work? Taking into account the overall status of sun4u emulation, it is a bit more work. AFAIR the SMP-related registers of Ultrasparc CPUs/chipsets are not impleme= nted. Additionally there are currently no sun4u SMP boards emulated in QEMU, but I think this is a smaller issue. Also some support in OpenBIOS might be necessary. Mark can surely tell more= . Artyom --=20 Regards, Artyom Tarasenko SPARC and PPC PReP under qemu blog: http://tyom.blogspot.com/search/label/q= emu