From: Jordan Niethe <jniethe5@gmail.com>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Subject: Re: [PATCH v3 14/14] RFC tcg/ppc: Disable TCG_REG_TB for Power9/Power10
Date: Fri, 15 Sep 2023 14:19:48 +1000 [thread overview]
Message-ID: <CACzsE9qPn5gMNLmRhYb_OhvOw7-bFOkQyD+08VzFogsVJKSNkg@mail.gmail.com> (raw)
In-Reply-To: <20230815195741.8325-15-richard.henderson@linaro.org>
On Wed, Aug 16, 2023 at 5:57 AM Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> This may or may not improve performance.
> It appears to result in slightly larger code,
> but perhaps not enough to matter.
I have collected some power9 macro performance data for an smp compile workload:
Setup
-----
- Power9 powernv host
- mttcg smp 8 guest
Method
------
- Warm up compile skiboot (https://github.com/open-power/skiboot)
- Average time taken for 5 trials compiling skiboot with -j `nproc`
Results
-------
| Patch | Mean time (s) | stdev | Decrease (%) |
|-------------------------------------|---------------|-------|--------------|
| tcg: Add tcg_out_tb_start... | 161.77 | 2.39 | - |
| tcg/ppc: Enable direct branching... | 145.81 | 1.71 | 9.9 |
| tcg/ppc: Use ADDPCIS... | 146.44 | 1.28 | 9.5 |
| RFC tcg/ppc: Disable TCG_REG_TB... | 145.95 | 1.07 | 9.7 |
- Enabling direct branching is a performance gain, beyond that less conclusive.
- Using pcaddis for direct branching seems slightly better than bl +4
sequence for ISA v3.0.
- PC relative addressing seems slightly better than TOC relative addressing.
Any other suggestions for performance comparison?
I still have to try on a Power10.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> tcg/ppc/tcg-target.c.inc | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc
> index 20aaa90af2..c1e0efb498 100644
> --- a/tcg/ppc/tcg-target.c.inc
> +++ b/tcg/ppc/tcg-target.c.inc
> @@ -83,7 +83,7 @@
> #define TCG_VEC_TMP2 TCG_REG_V1
>
> #define TCG_REG_TB TCG_REG_R31
> -#define USE_REG_TB (TCG_TARGET_REG_BITS == 64)
> +#define USE_REG_TB (TCG_TARGET_REG_BITS == 64 && !have_isa_3_00)
>
> /* Shorthand for size of a pointer. Avoid promotion to unsigned. */
> #define SZP ((int)sizeof(void *))
> --
> 2.34.1
>
prev parent reply other threads:[~2023-09-15 4:20 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-15 19:57 [PATCH v3 00/14] tcg/ppc: direct branching, power9, power10 Richard Henderson
2023-08-15 19:57 ` [PATCH v3 01/14] tcg/ppc: Untabify tcg-target.c.inc Richard Henderson
2023-08-15 19:57 ` [PATCH v3 02/14] tcg: Add tcg_out_tb_start backend hook Richard Henderson
2023-08-15 19:57 ` [PATCH v3 03/14] tcg/ppc: Enable direct branching tcg_out_goto_tb with TCG_REG_TB Richard Henderson
2023-08-15 19:57 ` [PATCH v3 04/14] tcg/ppc: Reinterpret tb-relative to TB+4 Richard Henderson
2023-08-15 19:57 ` [PATCH v3 05/14] tcg/ppc: Use ADDPCIS in tcg_out_tb_start Richard Henderson
2023-08-23 9:39 ` Jordan Niethe
2023-08-23 17:10 ` Richard Henderson
2023-08-15 19:57 ` [PATCH v3 06/14] tcg/ppc: Use ADDPCIS in tcg_out_movi_int Richard Henderson
2023-08-15 19:57 ` [PATCH v3 07/14] tcg/ppc: Use ADDPCIS for the constant pool Richard Henderson
2023-08-15 19:57 ` [PATCH v3 08/14] tcg/ppc: Use ADDPCIS in tcg_out_goto_tb Richard Henderson
2023-08-15 19:57 ` [PATCH v3 09/14] tcg/ppc: Use PADDI in tcg_out_movi Richard Henderson
2023-08-15 19:57 ` [PATCH v3 10/14] tcg/ppc: Use prefixed instructions in tcg_out_mem_long Richard Henderson
2023-08-15 19:57 ` [PATCH v3 11/14] tcg/ppc: Use PLD in tcg_out_movi for constant pool Richard Henderson
2023-08-15 19:57 ` [PATCH v3 12/14] tcg/ppc: Use prefixed instructions in tcg_out_dupi_vec Richard Henderson
2023-08-15 19:57 ` [PATCH v3 13/14] tcg/ppc: Use PLD in tcg_out_goto_tb Richard Henderson
2023-08-15 19:57 ` [PATCH v3 14/14] RFC tcg/ppc: Disable TCG_REG_TB for Power9/Power10 Richard Henderson
2023-09-15 4:19 ` Jordan Niethe [this message]
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