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b=MQpZQEIrNvQ+x0QpB8O67dhQuUBwi95mBMetNY6SdrFK5x9S90OAxGBclQz0Bl16MQ iSw0sqelTmYx9sOQu1ySdsV0LM8/79JP3pXfQmpxKAfSir3nr1tnXApky+5KAh+TmhyT 0RfHrnbr8WD0b7KWdA3l5dLeVba2tmYIc1nNzCgw19sgrA9CQ3acd2PdyWadZ7Y9pufI 4LXdJkRql2DOz05l+p68gwWiKtX91F0nEYEkkQZhCU6gmdQaod7l0RAH+yifSVV4aAgl tigxXgb6LhbqXeB5SuDNe76YW2h8gYDZhsEwRNI58XR8JVH+HI61ur8SpjqYukZsZlw3 L/kw== X-Gm-Message-State: AOJu0YxjYaaAQBrWss3p4fqvdmFCMECJBdGSiNbc3flkuxVk8TW9Rkxl zIZLAcY7XgC57X8ClNzNcj+GapUcaF0f5e08rdqE/SbtZZk= X-Google-Smtp-Source: AGHT+IFGO9NtiJS0XdiCMivGEGieya2bWif6NSF+/ib02HxZx9n7484Uv1UholQ50Bk5t+2rJGA+tt0vVdOulruZ8FQ= X-Received: by 2002:a17:907:7638:b0:997:e9a3:9c4f with SMTP id jy24-20020a170907763800b00997e9a39c4fmr6226756ejc.30.1691380400307; Sun, 06 Aug 2023 20:53:20 -0700 (PDT) MIME-Version: 1.0 References: <20230804213355.294443-1-richard.henderson@linaro.org> <20230804213355.294443-3-richard.henderson@linaro.org> In-Reply-To: <20230804213355.294443-3-richard.henderson@linaro.org> From: Jordan Niethe Date: Mon, 7 Aug 2023 13:53:09 +1000 Message-ID: Subject: Re: [PATCH 2/7] tcg/ppc: Use PADDI in tcg_out_movi To: Richard Henderson Cc: qemu-devel@nongnu.org, qemu-ppc@nongnu.org, bgray@linux.ibm.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::62c; envelope-from=jniethe5@gmail.com; helo=mail-ej1-x62c.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Sat, Aug 5, 2023 at 7:33=E2=80=AFAM Richard Henderson wrote: > > PADDI can load 34-bit immediates and 34-bit pc-relative addresses. > > Signed-off-by: Richard Henderson > --- > tcg/ppc/tcg-target.c.inc | 47 ++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 47 insertions(+) > > diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc > index 642d0fd128..7fa2a2500b 100644 > --- a/tcg/ppc/tcg-target.c.inc > +++ b/tcg/ppc/tcg-target.c.inc > @@ -707,6 +707,33 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int= type, > return true; > } > > +/* Ensure that the prefixed instruction does not cross a 64-byte boundar= y. */ > +static bool tcg_out_need_prefix_align(TCGContext *s) > +{ > + return ((uintptr_t)s->code_ptr & 0x3f) =3D=3D 0x3c; > +} > + > +static void tcg_out_prefix_align(TCGContext *s) > +{ > + if (tcg_out_need_prefix_align(s)) { > + tcg_out32(s, NOP); > + } > +} > + > +/* Output Type 10 Prefix - Modified Load/Store Form (MLS:D) */ > +static void tcg_out_mls_d(TCGContext *s, tcg_insn_unit opc, unsigned rt, > + unsigned ra, tcg_target_long imm, bool r) > +{ > + tcg_insn_unit p, i; > + > + p =3D OPCD(1) | (2 << 24) | (r << 20) | ((imm >> 16) & 0x3ffff); > + i =3D opc | TAI(rt, ra, imm); > + > + tcg_out_prefix_align(s); > + tcg_out32(s, p); > + tcg_out32(s, i); > +} > + > static void tcg_out_mem_long(TCGContext *s, int opi, int opx, TCGReg rt, > TCGReg base, tcg_target_long offset); > > @@ -992,6 +1019,26 @@ static void tcg_out_movi_int(TCGContext *s, TCGType= type, TCGReg ret, > return; > } > > + /* > + * Load values up to 34 bits, and pc-relative addresses, > + * with one prefixed insn. > + */ > + if (have_isa_3_10) { > + if (arg =3D=3D sextract64(arg, 0, 34)) { > + /* pli ret,value =3D paddi ret,0,value,0 */ > + tcg_out_mls_d(s, ADDI, ret, 0, arg, 0); > + return; > + } > + > + tmp =3D tcg_out_need_prefix_align(s) * 4; tcg_out_need_prefix_align() returns a bool, optionally might prefer tmp =3D tcg_out_need_prefix_align(s) ? 4 : 0; > + tmp =3D tcg_pcrel_diff(s, (void *)arg) - tmp; > + if (tmp =3D=3D sextract64(tmp, 0, 34)) { > + /* pla ret,value =3D paddi ret,0,value,1 */ > + tcg_out_mls_d(s, ADDI, ret, 0, tmp, 1); > + return; > + } > + } > + > /* Load 32-bit immediates with two insns. Note that we've already > eliminated bare ADDIS, so we know both insns are required. */ > if (TCG_TARGET_REG_BITS =3D=3D 32 || arg =3D=3D (int32_t)arg) { > -- > 2.34.1 > Reviewed-by: Jordan Niethe