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Fri, 12 Sep 2025 10:44:05 -0700 (PDT) MIME-Version: 1.0 References: <20250903213809.3779860-1-lixiaoyan@google.com> <20250903213809.3779860-2-lixiaoyan@google.com> In-Reply-To: From: Coco Li Date: Fri, 12 Sep 2025 10:43:53 -0700 X-Gm-Features: Ac12FXxnuV3NoMwYMKUqwyFl2bgbQRtXILEQhkalURrnZuqfJhl0_N2aCxRvN9c Message-ID: Subject: Re: [PATCH 1/5] hw/gpio: Add property for ASPEED GPIO in 32 bits basis To: Andrew Jeffery Cc: peter.maydell@linaro.org, clg@kaod.org, qemu-arm@nongnu.org, qemu-devel@nongnu.org, Felix Wu Content-Type: multipart/alternative; boundary="0000000000003bd89c063e9e33bc" Received-SPF: pass client-ip=2a00:1450:4864:20::534; envelope-from=lixiaoyan@google.com; helo=mail-ed1-x534.google.com X-Spam_score_int: -165 X-Spam_score: -16.6 X-Spam_bar: ---------------- X-Spam_report: (-16.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, ENV_AND_HDR_SPF_MATCH=-0.5, HK_RANDOM_ENVFROM=0.001, HK_RANDOM_FROM=0.998, HTML_MESSAGE=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, USER_IN_DEF_DKIM_WL=-7.5, USER_IN_DEF_SPF_WL=-7.5 autolearn=no autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Fri, 12 Sep 2025 17:06:15 -0400 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org --0000000000003bd89c063e9e33bc Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hello Andrew, I discussed with the original author of the patch and the Nuvoton functionality mentioned above has not been upstreamed since then, unfortunately. Aside from the comment above, we believe this patch series allows gpios to be accessed more dynamically/flexibly in complicated simulation, and also helps with accessing advanced gpio features, see the sgpio implementation later in this patch series. Best, Coco On Tue, Sep 9, 2025 at 8:52=E2=80=AFPM Andrew Jeffery wrote: > On Wed, 2025-09-03 at 21:38 +0000, Coco Li wrote: > > From: Felix Wu > > > > Added 32 bits property for ASPEED GPIO. Previously it can only be acces= s > in bitwise manner. > > > > This change gives ASPEED similar behavior as Nuvoton. > > Can you point me to the Nuvoton functionality? I had a quick look and > couldn't immediately see an equivalent implementation. > > Regardless, I'd like to see more motivation in the commit message than > "make it behave like Nuvoton". Can you provide a concrete use-case as > an example? > > Andrew > --0000000000003bd89c063e9e33bc Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Hello Andrew,

I discussed with the orig= inal author of the patch and the Nuvoton functionality mentioned above has = not been upstreamed since then, unfortunately.
Aside from the com= ment above, we believe this patch series allows gpios to be accessed more d= ynamically/flexibly in complicated simulation, and also helps with accessin= g advanced gpio features, see the sgpio implementation later in this patch = series.

Best,
Coco

On Tue, Sep 9, 2= 025 at 8:52=E2=80=AFPM Andrew Jeffery <andrew@codeconstruct.com.au> wrote:<= br>
On Wed, 2025-09-= 03 at 21:38 +0000, Coco Li wrote:
> From: Felix Wu <flwu@google.com>
>
> Added 32 bits property for ASPEED GPIO. Previously it can only be acce= ss in bitwise manner.
>
> This change gives ASPEED similar behavior as Nuvoton.

Can you point me to the Nuvoton functionality? I had a quick look and
couldn't immediately see an equivalent implementation.

Regardless, I'd like to see more motivation in the commit message than<= br> "make it behave like Nuvoton". Can you provide a concrete use-cas= e as
an example?

Andrew
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