Re: [PATCH v3 1/3] riscv: Unify Qemu's reset vector code path

[Bin Meng <bmeng.cn@gmail.com>]

On Fri, Jun 26, 2020 at 8:33 AM Atish Patra <atish.patra@wdc.com> wrote:
>
> Currently, all riscv machines except sifive_u have identical reset vector
> code implementations with memory addresses being different for all machines.
> They can be easily combined into a single function in common code.
>
> Move it to common function and let all the machines use the common function.
>
> Signed-off-by: Atish Patra <atish.patra@wdc.com>
> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
> ---
>  hw/riscv/boot.c         | 45 +++++++++++++++++++++++++++++++++++++++++
>  hw/riscv/sifive_u.c     |  1 -
>  hw/riscv/spike.c        | 41 +++----------------------------------
>  hw/riscv/virt.c         | 40 +++---------------------------------
>  include/hw/riscv/boot.h |  2 ++
>  5 files changed, 53 insertions(+), 76 deletions(-)
>

Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>