From: Bin Meng <bmeng.cn@gmail.com>
To: Alistair Francis <alistair.francis@wdc.com>
Cc: Alistair Francis <alistair23@gmail.com>,
Palmer Dabbelt <palmer@sifive.com>,
"open list:RISC-V" <qemu-riscv@nongnu.org>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH v1 2/5] hw/riscv: Add support for loading a firmware
Date: Tue, 25 Jun 2019 17:20:14 +0800 [thread overview]
Message-ID: <CAEUhbmVyDyx-YPdZPj2sj_Xfc1PDbRLO96nTWRQF4ax3+ofWLg@mail.gmail.com> (raw)
In-Reply-To: <03f453d45b8565472386fdb7403b6713ddbb8683.1561414240.git.alistair.francis@wdc.com>
On Tue, Jun 25, 2019 at 6:19 AM Alistair Francis
<alistair.francis@wdc.com> wrote:
>
> Add support for loading a firmware file for the virt machine and the
> SiFive U. This can be run with the following command:
>
> qemu-system-riscv64 -machine virt -bios fw_jump.bin -kernel vmlinux
>
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
> ---
> hw/riscv/boot.c | 26 ++++++++++++++++++++++++++
> hw/riscv/sifive_u.c | 4 ++++
> hw/riscv/virt.c | 4 ++++
> include/hw/riscv/boot.h | 2 ++
> 4 files changed, 36 insertions(+)
>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
next prev parent reply other threads:[~2019-06-25 9:22 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-24 22:11 [Qemu-devel] [PATCH v1 0/5] RISC-V: Add firmware loading support and default Alistair Francis
2019-06-24 22:11 ` [Qemu-devel] [PATCH v1 1/5] hw/riscv: Split out the boot functions Alistair Francis
2019-06-24 22:11 ` [Qemu-devel] [PATCH v1 2/5] hw/riscv: Add support for loading a firmware Alistair Francis
2019-06-25 9:20 ` Bin Meng [this message]
2019-06-24 22:11 ` [Qemu-devel] [PATCH v1 3/5] hw/riscv: Extend the kernel loading support Alistair Francis
2019-06-25 9:20 ` Bin Meng
2019-06-24 22:11 ` [Qemu-devel] [PATCH v1 4/5] roms: Add OpenSBI version 0.3 Alistair Francis
2019-06-25 9:20 ` Bin Meng
2019-06-27 11:45 ` Jonathan Cameron
2019-06-24 22:12 ` [Qemu-devel] [PATCH v1 5/5] hw/riscv: Load OpenSBI as the default firmware Alistair Francis
2019-06-25 9:20 ` Bin Meng
2019-06-25 17:06 ` [Qemu-devel] [PATCH v1 0/5] RISC-V: Add firmware loading support and default Alistair Francis
2019-06-26 6:21 ` Palmer Dabbelt
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=CAEUhbmVyDyx-YPdZPj2sj_Xfc1PDbRLO96nTWRQF4ax3+ofWLg@mail.gmail.com \
--to=bmeng.cn@gmail.com \
--cc=alistair.francis@wdc.com \
--cc=alistair23@gmail.com \
--cc=palmer@sifive.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-riscv@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).