* [Qemu-devel] [PATCH] riscv: virt: Correct pci "bus-range" encoding
@ 2019-05-29 8:52 Bin Meng
2019-05-30 3:13 ` Alistair Francis
0 siblings, 1 reply; 7+ messages in thread
From: Bin Meng @ 2019-05-29 8:52 UTC (permalink / raw)
To: qemu-riscv, qemu-devel, Alistair Francis, Palmer Dabbelt
The largest pci bus number should be calculated from ECAM size,
instead of its base address.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---
hw/riscv/virt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index fc4c6b3..d6132d9 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -299,7 +299,7 @@ static void *create_fdt(RISCVVirtState *s, const struct MemmapEntry *memmap,
qemu_fdt_setprop_string(fdt, nodename, "device_type", "pci");
qemu_fdt_setprop_cell(fdt, nodename, "linux,pci-domain", 0);
qemu_fdt_setprop_cells(fdt, nodename, "bus-range", 0,
- memmap[VIRT_PCIE_ECAM].base /
+ memmap[VIRT_PCIE_ECAM].size /
PCIE_MMCFG_SIZE_MIN - 1);
qemu_fdt_setprop(fdt, nodename, "dma-coherent", NULL, 0);
qemu_fdt_setprop_cells(fdt, nodename, "reg", 0, memmap[VIRT_PCIE_ECAM].base,
--
2.7.4
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [Qemu-devel] [PATCH] riscv: virt: Correct pci "bus-range" encoding
2019-05-29 8:52 [Qemu-devel] [PATCH] riscv: virt: Correct pci "bus-range" encoding Bin Meng
@ 2019-05-30 3:13 ` Alistair Francis
2019-05-30 3:36 ` Bin Meng
0 siblings, 1 reply; 7+ messages in thread
From: Alistair Francis @ 2019-05-30 3:13 UTC (permalink / raw)
To: Bin Meng
Cc: Alistair Francis, Palmer Dabbelt, open list:RISC-V,
qemu-devel@nongnu.org Developers
On Wed, May 29, 2019 at 1:52 AM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> The largest pci bus number should be calculated from ECAM size,
> instead of its base address.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This seems ok, can you maybe explain what this fixes?
Alistair
> ---
>
> hw/riscv/virt.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
> index fc4c6b3..d6132d9 100644
> --- a/hw/riscv/virt.c
> +++ b/hw/riscv/virt.c
> @@ -299,7 +299,7 @@ static void *create_fdt(RISCVVirtState *s, const struct MemmapEntry *memmap,
> qemu_fdt_setprop_string(fdt, nodename, "device_type", "pci");
> qemu_fdt_setprop_cell(fdt, nodename, "linux,pci-domain", 0);
> qemu_fdt_setprop_cells(fdt, nodename, "bus-range", 0,
> - memmap[VIRT_PCIE_ECAM].base /
> + memmap[VIRT_PCIE_ECAM].size /
> PCIE_MMCFG_SIZE_MIN - 1);
> qemu_fdt_setprop(fdt, nodename, "dma-coherent", NULL, 0);
> qemu_fdt_setprop_cells(fdt, nodename, "reg", 0, memmap[VIRT_PCIE_ECAM].base,
> --
> 2.7.4
>
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH] riscv: virt: Correct pci "bus-range" encoding
2019-05-30 3:13 ` Alistair Francis
@ 2019-05-30 3:36 ` Bin Meng
2019-06-06 12:55 ` Bin Meng
0 siblings, 1 reply; 7+ messages in thread
From: Bin Meng @ 2019-05-30 3:36 UTC (permalink / raw)
To: Alistair Francis
Cc: Alistair Francis, Palmer Dabbelt, open list:RISC-V,
qemu-devel@nongnu.org Developers
Hi Alistair,
On Thu, May 30, 2019 at 11:14 AM Alistair Francis <alistair23@gmail.com> wrote:
>
> On Wed, May 29, 2019 at 1:52 AM Bin Meng <bmeng.cn@gmail.com> wrote:
> >
> > The largest pci bus number should be calculated from ECAM size,
> > instead of its base address.
> >
> > Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>
> This seems ok, can you maybe explain what this fixes?
>
The logic is wrong, as the commit message said. With current wrong
logic, the largest pci bus number encoded in "bus-ranges" property was
wrongly set to 0x2ff in this case. Per pci spec, the bus number should
not exceed 0xff.
Regards,
Bin
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH] riscv: virt: Correct pci "bus-range" encoding
2019-05-30 3:36 ` Bin Meng
@ 2019-06-06 12:55 ` Bin Meng
2019-06-06 18:43 ` Alistair Francis
0 siblings, 1 reply; 7+ messages in thread
From: Bin Meng @ 2019-06-06 12:55 UTC (permalink / raw)
To: Alistair Francis
Cc: Alistair Francis, Palmer Dabbelt, open list:RISC-V,
qemu-devel@nongnu.org Developers
On Thu, May 30, 2019 at 11:36 AM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> Hi Alistair,
>
> On Thu, May 30, 2019 at 11:14 AM Alistair Francis <alistair23@gmail.com> wrote:
> >
> > On Wed, May 29, 2019 at 1:52 AM Bin Meng <bmeng.cn@gmail.com> wrote:
> > >
> > > The largest pci bus number should be calculated from ECAM size,
> > > instead of its base address.
> > >
> > > Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> >
> > This seems ok, can you maybe explain what this fixes?
> >
>
> The logic is wrong, as the commit message said. With current wrong
> logic, the largest pci bus number encoded in "bus-ranges" property was
> wrongly set to 0x2ff in this case. Per pci spec, the bus number should
> not exceed 0xff.
>
Ping?
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH] riscv: virt: Correct pci "bus-range" encoding
2019-06-06 12:55 ` Bin Meng
@ 2019-06-06 18:43 ` Alistair Francis
2019-06-26 1:47 ` Bin Meng
0 siblings, 1 reply; 7+ messages in thread
From: Alistair Francis @ 2019-06-06 18:43 UTC (permalink / raw)
To: Bin Meng
Cc: Alistair Francis, Palmer Dabbelt, open list:RISC-V,
qemu-devel@nongnu.org Developers
On Thu, Jun 6, 2019 at 5:55 AM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> On Thu, May 30, 2019 at 11:36 AM Bin Meng <bmeng.cn@gmail.com> wrote:
> >
> > Hi Alistair,
> >
> > On Thu, May 30, 2019 at 11:14 AM Alistair Francis <alistair23@gmail.com> wrote:
> > >
> > > On Wed, May 29, 2019 at 1:52 AM Bin Meng <bmeng.cn@gmail.com> wrote:
> > > >
> > > > The largest pci bus number should be calculated from ECAM size,
> > > > instead of its base address.
> > > >
> > > > Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> > >
> > > This seems ok, can you maybe explain what this fixes?
> > >
> >
> > The logic is wrong, as the commit message said. With current wrong
> > logic, the largest pci bus number encoded in "bus-ranges" property was
> > wrongly set to 0x2ff in this case. Per pci spec, the bus number should
> > not exceed 0xff.
> >
>
> Ping?
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH] riscv: virt: Correct pci "bus-range" encoding
2019-06-06 18:43 ` Alistair Francis
@ 2019-06-26 1:47 ` Bin Meng
2019-06-26 8:01 ` Palmer Dabbelt
0 siblings, 1 reply; 7+ messages in thread
From: Bin Meng @ 2019-06-26 1:47 UTC (permalink / raw)
To: Alistair Francis
Cc: Alistair Francis, Palmer Dabbelt, open list:RISC-V,
qemu-devel@nongnu.org Developers
Hi,
On Fri, Jun 7, 2019 at 2:46 AM Alistair Francis <alistair23@gmail.com> wrote:
>
> On Thu, Jun 6, 2019 at 5:55 AM Bin Meng <bmeng.cn@gmail.com> wrote:
> >
> > On Thu, May 30, 2019 at 11:36 AM Bin Meng <bmeng.cn@gmail.com> wrote:
> > >
> > > Hi Alistair,
> > >
> > > On Thu, May 30, 2019 at 11:14 AM Alistair Francis <alistair23@gmail.com> wrote:
> > > >
> > > > On Wed, May 29, 2019 at 1:52 AM Bin Meng <bmeng.cn@gmail.com> wrote:
> > > > >
> > > > > The largest pci bus number should be calculated from ECAM size,
> > > > > instead of its base address.
> > > > >
> > > > > Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> > > >
> > > > This seems ok, can you maybe explain what this fixes?
> > > >
> > >
> > > The logic is wrong, as the commit message said. With current wrong
> > > logic, the largest pci bus number encoded in "bus-ranges" property was
> > > wrongly set to 0x2ff in this case. Per pci spec, the bus number should
> > > not exceed 0xff.
> > >
> >
> > Ping?
>
> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Can this go in the 4.1 PR?
Regards,
Bin
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH] riscv: virt: Correct pci "bus-range" encoding
2019-06-26 1:47 ` Bin Meng
@ 2019-06-26 8:01 ` Palmer Dabbelt
0 siblings, 0 replies; 7+ messages in thread
From: Palmer Dabbelt @ 2019-06-26 8:01 UTC (permalink / raw)
To: bmeng.cn; +Cc: alistair23, Alistair Francis, qemu-riscv, qemu-devel
On Tue, 25 Jun 2019 18:47:33 PDT (-0700), bmeng.cn@gmail.com wrote:
> Hi,
>
> On Fri, Jun 7, 2019 at 2:46 AM Alistair Francis <alistair23@gmail.com> wrote:
>>
>> On Thu, Jun 6, 2019 at 5:55 AM Bin Meng <bmeng.cn@gmail.com> wrote:
>> >
>> > On Thu, May 30, 2019 at 11:36 AM Bin Meng <bmeng.cn@gmail.com> wrote:
>> > >
>> > > Hi Alistair,
>> > >
>> > > On Thu, May 30, 2019 at 11:14 AM Alistair Francis <alistair23@gmail.com> wrote:
>> > > >
>> > > > On Wed, May 29, 2019 at 1:52 AM Bin Meng <bmeng.cn@gmail.com> wrote:
>> > > > >
>> > > > > The largest pci bus number should be calculated from ECAM size,
>> > > > > instead of its base address.
>> > > > >
>> > > > > Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> > > >
>> > > > This seems ok, can you maybe explain what this fixes?
>> > > >
>> > >
>> > > The logic is wrong, as the commit message said. With current wrong
>> > > logic, the largest pci bus number encoded in "bus-ranges" property was
>> > > wrongly set to 0x2ff in this case. Per pci spec, the bus number should
>> > > not exceed 0xff.
>> > >
>> >
>> > Ping?
>>
>> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
>
> Can this go in the 4.1 PR?
This one I didn't miss, it's been in the queue for a bit. Thanks!
^ permalink raw reply [flat|nested] 7+ messages in thread
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2019-05-29 8:52 [Qemu-devel] [PATCH] riscv: virt: Correct pci "bus-range" encoding Bin Meng
2019-05-30 3:13 ` Alistair Francis
2019-05-30 3:36 ` Bin Meng
2019-06-06 12:55 ` Bin Meng
2019-06-06 18:43 ` Alistair Francis
2019-06-26 1:47 ` Bin Meng
2019-06-26 8:01 ` Palmer Dabbelt
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