From: Bin Meng <bmeng.cn@gmail.com>
To: Alistair Francis <alistair.francis@opensource.wdc.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
Alistair Francis <alistair.francis@wdc.com>,
"open list:RISC-V" <qemu-riscv@nongnu.org>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
Alistair Francis <alistair23@gmail.com>
Subject: Re: [PATCH v1 6/9] hw/intc: sifive_plic: Add a reset function
Date: Thu, 21 Oct 2021 15:37:03 +0800 [thread overview]
Message-ID: <CAEUhbmXez21dQicgRtydMTxv0P6V5eVubca1t_yZq_JC8LhgEw@mail.gmail.com> (raw)
In-Reply-To: <8fdf384ca71009a6c3f4e684dc88940c5cd3f284.1634524691.git.alistair.francis@wdc.com>
On Mon, Oct 18, 2021 at 10:40 AM Alistair Francis
<alistair.francis@opensource.wdc.com> wrote:
>
> From: Alistair Francis <alistair.francis@wdc.com>
>
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
> ---
> hw/intc/sifive_plic.c | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/hw/intc/sifive_plic.c b/hw/intc/sifive_plic.c
> index 877e76877c..5444368ad4 100644
> --- a/hw/intc/sifive_plic.c
> +++ b/hw/intc/sifive_plic.c
> @@ -355,6 +355,18 @@ static const MemoryRegionOps sifive_plic_ops = {
> }
> };
>
> +static void sifive_plic_reset(DeviceState *dev)
> +{
> + SiFivePLICState *s = SIFIVE_PLIC(dev);
> +
> + memset(s->claimed, 0, sizeof(uint32_t) * s->bitfield_words);
This line should be removed.
> + memset(s->source_priority, 0, sizeof(uint32_t) * s->num_sources);
> + memset(s->target_priority, 0, sizeof(uint32_t) * s->num_addrs);
> + memset(s->pending, 0, sizeof(uint32_t) * s->bitfield_words);
> + memset(s->claimed, 0, sizeof(uint32_t) * s->bitfield_words);
> + memset(s->enable, 0, sizeof(uint32_t) * s->num_enables);
> +}
> +
> /*
> * parse PLIC hart/mode address offset config
> *
> @@ -501,6 +513,7 @@ static void sifive_plic_class_init(ObjectClass *klass, void *data)
> {
> DeviceClass *dc = DEVICE_CLASS(klass);
>
> + dc->reset = sifive_plic_reset;
> device_class_set_props(dc, sifive_plic_properties);
> dc->realize = sifive_plic_realize;
> dc->vmsd = &vmstate_sifive_plic;
Regards,
Bin
next prev parent reply other threads:[~2021-10-21 7:41 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-18 2:38 [PATCH v1 1/9] hw/riscv: opentitan: Update to the latest build Alistair Francis
2021-10-18 2:38 ` [PATCH v1 2/9] hw/intc: Remove the Ibex PLIC Alistair Francis
2021-10-21 7:27 ` Bin Meng
2021-10-18 2:39 ` [PATCH v1 3/9] hw/intc: sifive_plic: Move the properties Alistair Francis
2021-10-21 7:29 ` Bin Meng
2021-10-18 2:39 ` [PATCH v1 4/9] hw/intc: sifive_plic: Cleanup the realize function Alistair Francis
2021-10-21 7:32 ` Bin Meng
2021-10-18 2:39 ` [PATCH v1 5/9] hw/intc: sifive_plic: Cleanup the irq_request function Alistair Francis
2021-10-21 7:33 ` Bin Meng
2021-10-21 21:58 ` Alistair Francis
2021-10-18 2:39 ` [PATCH v1 6/9] hw/intc: sifive_plic: Add a reset function Alistair Francis
2021-10-21 7:37 ` Bin Meng [this message]
2021-10-18 2:40 ` [PATCH v1 7/9] hw/intc: sifive_plic: Cleanup the write function Alistair Francis
2021-10-21 8:53 ` Bin Meng
2021-10-18 2:40 ` [PATCH v1 8/9] hw/intc: sifive_plic: Cleanup the read function Alistair Francis
2021-10-21 8:53 ` Bin Meng
2021-10-18 2:40 ` [PATCH v1 9/9] hw/intc: sifive_plic: Cleanup remaining functions Alistair Francis
2021-10-21 8:53 ` Bin Meng
2021-10-21 7:26 ` [PATCH v1 1/9] hw/riscv: opentitan: Update to the latest build Bin Meng
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