From: Bin Meng <bmeng.cn@gmail.com>
To: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org,
alistair.francis@wdc.com, bmeng@tinylab.org,
liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com,
richard.henderson@linaro.org
Subject: Re: [PATCH v6 2/9] target/riscv: introduce riscv_cpu_cfg()
Date: Fri, 17 Feb 2023 08:47:31 +0800 [thread overview]
Message-ID: <CAEUhbmXta4bLtrRXKpsJq28aG9reTZfm4rhGUybDbgcqS5X2BQ@mail.gmail.com> (raw)
In-Reply-To: <CAEUhbmVQa=A4CXT=hhN_NNaq2ObbZ3e13GJB+7UJ3H+-qMsOyw@mail.gmail.com>
On Fri, Feb 17, 2023 at 8:45 AM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> On Fri, Feb 17, 2023 at 5:57 AM Daniel Henrique Barboza
> <dbarboza@ventanamicro.com> wrote:
> >
> > We're going to do changes that requires accessing the RISCVCPUConfig
> > struct from the RISCVCPU, having access only to a CPURISCVState 'env'
> > pointer. Add a helper to make the code easier to read.
> >
> > Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> > ---
> > target/riscv/cpu.h | 5 +++++
> > 1 file changed, 5 insertions(+)
> >
>
> Looks like the RB tag is missing somehow?
Never mind. I see the difference :)
Regards,
Bin
next prev parent reply other threads:[~2023-02-17 0:47 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-16 21:55 [PATCH v6 0/9] make write_misa a no-op and FEATURE_* cleanups Daniel Henrique Barboza
2023-02-16 21:55 ` [PATCH v6 1/9] target/riscv: turn write_misa() into an official no-op Daniel Henrique Barboza
2023-02-17 1:42 ` LIU Zhiwei
2023-02-21 15:49 ` Daniel Henrique Barboza
2023-02-21 17:06 ` Andrew Jones
2023-02-21 18:22 ` Daniel Henrique Barboza
2023-02-21 18:28 ` Andrew Jones
2023-02-22 8:41 ` Daniel Henrique Barboza
2023-02-22 9:21 ` LIU Zhiwei
2023-02-22 16:42 ` Daniel Henrique Barboza
2023-02-17 2:31 ` weiwei
2023-02-16 21:55 ` [PATCH v6 2/9] target/riscv: introduce riscv_cpu_cfg() Daniel Henrique Barboza
2023-02-17 0:45 ` Bin Meng
2023-02-17 0:47 ` Bin Meng [this message]
2023-02-17 1:45 ` LIU Zhiwei
2023-02-17 1:50 ` LIU Zhiwei
2023-02-17 2:19 ` LIU Zhiwei
2023-02-17 2:31 ` weiwei
2023-02-17 2:55 ` LIU Zhiwei
2023-02-17 8:39 ` Daniel Henrique Barboza
2023-02-17 5:40 ` Richard Henderson
2023-02-16 21:55 ` [PATCH v6 3/9] target/riscv: remove RISCV_FEATURE_DEBUG Daniel Henrique Barboza
2023-02-17 1:53 ` LIU Zhiwei
2023-02-16 21:55 ` [PATCH v6 4/9] target/riscv/cpu.c: error out if EPMP is enabled without PMP Daniel Henrique Barboza
2023-02-17 1:55 ` LIU Zhiwei
2023-02-16 21:55 ` [PATCH v6 5/9] target/riscv: remove RISCV_FEATURE_EPMP Daniel Henrique Barboza
2023-02-17 1:58 ` LIU Zhiwei
2023-02-16 21:55 ` [PATCH v6 6/9] target/riscv: remove RISCV_FEATURE_PMP Daniel Henrique Barboza
2023-02-17 1:59 ` LIU Zhiwei
2023-02-16 21:55 ` [PATCH v6 7/9] hw/riscv/virt.c: do not use RISCV_FEATURE_MMU in create_fdt_socket_cpus() Daniel Henrique Barboza
2023-02-17 1:59 ` LIU Zhiwei
2023-02-16 21:55 ` [PATCH v6 8/9] target/riscv: remove RISCV_FEATURE_MMU Daniel Henrique Barboza
2023-02-17 2:04 ` LIU Zhiwei
2023-02-16 21:55 ` [PATCH v6 9/9] target/riscv/cpu: remove CPUArchState::features and friends Daniel Henrique Barboza
2023-02-17 2:05 ` LIU Zhiwei
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